R-tile PCIe example design questa simulation fail

[tthhuang]

Hello,

I followed ug-20330-683544-816251, chap 2.3 to generate PIO design example and simulation environment. Then I follow 2.3.1.1. Siemens EDA QuestaSim Simulator, but it hanged wo any progress after 1 days, the latest log is as below.

Did I have some wrong configuration?

Best regards

Victor

[wchiah]

Hi,

Thanks for contacting Intel. I'm assigned to support request.

I'll investigate and get back to you soon. Thanks for your patience.

Best regards,

Wincent_Intel

[wchiah]

Hi,

May I know which Quartus version that you are using ?
I tried 22.2 at my side, the example design and simulation both are successful.
BTW, I'm using questasim/2021.4 version.

Regards,
Wincent_Intel

[tthhuang]

Hi wchiah,

I use Quartus24.1 w/ questa2023.4, thank you.

[wchiah]

Hi,

Can you try to get the golden PCIe example from 
https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agi027.html

Then try to simulate again, let me know if you are still seeing the same problem.

IF, you are trying it in TLPBYPASS mode, please noted that it is doesn't support simulation, only supports for HW.

Regards,

Wincent_Intel

[tthhuang]

Hi Wchiah,

Yes, it works now after using the example design.

Best regards

Victor

[wchiah]

Hi

Glad to hear you are able to resolved the problem.

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