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Posted by intel_stewart Oct 26, 2009


Codename Black Sand is an initiative within the Embedded Group to enable an ecosystem of developers, scholars, students, hackers and hobbyists adding hardware and software support for a related series of low cost Embedded Atom Boards. Current Intel customers are welcome also, but the main idea behind Codename Black Sand is to engage with like minded individuals and groups  who are currently using alternatives to Atom devices, and to work with the embedded community to promote existing solutions.


If the solutions don't exist, then this is the place to come to engage with these individuals and groups and foster a community to help develop the solutions.



There are  several overlapping sub-projects, but the common gathering point for all of these is the Embedded Development Center (, and that is where the public face of Codename Black Sand can be seen.


Sub Projects that I'm working on right now include.

  • Atom Starter Kit #1 : This project is adopting a next generation Atom Processor, IEEE beyond menlow, development board as its first hardware instantiation. The board is in debug right now, and I'll be posting regular updates as it progresses.
  • 122iF9557FAC9BBCBDB4

-This means until we launch the silicon you will need private access to view schematics and most of the technical info.  Follow this link to request private access.



  • University Enabling : The Embedded Team are working with the Intel Higher Education team to help develop research and curriculum based on Embedded Atom.

-I expect to have a version of the Atom Starter Kit #1 available for selected universities before the end of the year.



  • EDC Seed Board #2: As part of the Avnet* Embedded Revolution Seminar Series the Low-Power Embedded Processor Division (LEPD) got together with one of the co-sponsors,  Advantech*, to enable a mini-ITX board, also based on next gen Atom, as a giveaway for attendees.

-The web page to request a board is due to go live end of October on EDC, and we will have around 200 boards to give away. UPDATE Nov 20th Link is live, goto Seedboard Interest from Avnet show is good, but there will be some available for general enabling. Preference will be given to developers wishing to make something fun, interesting or novel, particularly if you wish to post about it on EDC, or if you have your own blog, or site. 


Build Your Own Embedded Systems Class at Embedded Systems Conference, San Jose.Intel and Techinsights are working with Microsoft to sponsor the BYOES class in April at the San Jose Embedded Systems Conference. 

Update Dec 22nd 2009


The Dual Core D510 Atom Processor, announced in December and launched in Q1 2010 will be featured along with Microsoft's  Windows Embedded Standard 2011 code name "Quebec". This processor features Hyperthreading, and supports four execution threads. has the tech specs on the processor. 


  • Books:

-The Embedded Computing Group (ECG) is developing an Atom Book, we will be posting excerpts from the book on EDC, and soliciting feedback.

-The Embedded Linux Primer is being updated by its author; and this projects involvement includes removing all the old Intel XScale content:smileysad:, and adding/reviewing new Atom content.:smileyvery-happy: Again I hope to have excerpts posted on EDC as it goes along.


  • Co-Marketing, Blogs, White Paper, ECG Ambassadors.

-There's not much point in doing all this without getting the word out there, so part of the initiative is to enable User Developed Content on EDC. As we launch , the EDC content is pretty much all from Intel, or ECA vendors, or paid Blog Authors.  All of the above sub-projects include a component that encourages and rewards content from Users, Scholars, Customers, and others, to be posted on EDC. 

I can't offer monetary awards, as I have none, but I can offer free boards, free support, free software, free hosting and publicity for your project. But I am working on getting some money too.:robotwink:


  • Other ideas: Robots, you can never have enough robots.

Matt Bunting, a research assistant at University of Arizona h123iFDCB13F621AAD194as built a great robot using an embedded Atom design to run the reverse kinematics algorithms that allow this six legged hexapod to walk. As I am working on this project , (and I am the decider), I have decided to add this as the first example, of fun projects, so there's a separate blog post with links to the YouTube videos of this great device. Intel's Embedded Group is sponsoring the next version of this robot, and this rendering shows the proposal for the new legs.


If you would like more info, or feel you would like to get involved, in any of the sub-projects, please contact me at, or via twitter at @intel_stewart or go to the public page on EDC at and hit the reply button.


Completing a successful software migration from one processor architecture to another requires an awareness of architecture differences and its impact to the software. The main point to keep in mind is that every situation is different, depending on the goals and requirements of the migration. The level of effort required all depends on the amount of abstraction that is already programmed into the existing code. For example, depending on whether assumptions are made throughout the code base about the underlying operating system (OS) or hardware the migration could be as simple as recompiling the software, or could be more involved, requiring extra programming for areas of software that are hardware or OS dependent. Rest assured, there is nothing to fear but…well I guess that phrase has already been coined. Hopefully you get the point. A successful port can be achieved by assessing and understanding the current situation and requirements, and planning each step before the migration begins.


I hope to use this media as an open dialog to help developers with their IA migration projects. Let me know if there are any topics that you would like more information about.


Note: This “Migrating to Intel® Architecture” blog series will review the software implications of migrating to Intel Architecture (IA). This first blog provides an overview of what’s involved and will be followed by blogs that dive deeper into each area.


Migration Overview

There are two parts of software design involved when considering migrating to IA, which include adopting IA (run correctly on one IA core) and then adopting multi-core (benefit from multiple cores). At a very high level there are 5 basic steps, which cover both parts.


  • Step 1: Port the current code to the target OS.
  • Step 2: Execute the code correctly on one IA core.
  • Step 3: Optimize the code for one IA core.
  • Step 4: Apply multi-core software design updates.
  • Step 5: Optimize the code for multi-core IA performance.


Step 1: Port the current code to the target OS

If the architecture migration includes a port to a different operating system, even if its moving from the uni-processor to symmetric multiprocessing (SMP) version of the same OS, complete the port to the new operating system before you start the migration of the software to IA. This step helps to isolate and resolve issues that are not directly related to processor architecture differences.


When choosing the target OS, check with the OS distributor to see if there is an OS migration guide available that supports the current and target OS pair used in the migration.  


Considerations for porting source code to a new OS not only includes updating the OS calls, but also includes locating the correct version of all necessary third-party utilities and libraries needed to build the application (especially in the next step for adopting for IA). Common examples are:


  • Source control system
  • Developer tools
  • Build utilities
  • Licensing, graphics, or other third-party libraries


The goal in this step is to ensure that the software performs as expected and correctly on the new OS, prior to any changes for IA. Since this step requires stability of the same code running on the target OS, do not make other software design changes in this step.


In the next blog I’ll start covering topics within the more involved Step 2: Execute the code correctly on one IA core. Is there anything specific you would like to make sure that I cover?


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