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We’ve covered the technology integrated in the new Intel® Atom™ E6xx processor family quite a bit of late, so let’s take the next step and discuss how the increased level of integration in the new Intel® Architecture (IA) family matches up with embedded applications. Embedded design teams may be surprised to learn that the E6xx eliminates the need for a separate graphics IC and also can leverage application-specific I/O controller ICs. Modular product vendors are already offering products that target specific applications such as industrial and automotive. Moreover, IC and software vendors are paving the way to more integrated designs.


If you want more information on the E6xx, I’d recommend you check out a few earlier blogs. Kenton Williston first covered the E6xx back in September around IDF noting that it was the “first IA processor designed specifically for embedded applications.” More recently, I wrote about the rugged modular products that are already available based on the E6xx family.


Today, let’s consider where else the processor family fits well along with the companies supporting specific applications. For example, consider Congatec*. The company introduced a modular E6xx-based product, the conga-QA6, back at IDF. The module is based on the Qseven modular standard for 70mm-x-70mm boards that is promulgated by the Qseven Consortium. The single-board computer (SBC) platform is somewhat similar to the COM Express platform in that the SBCs are meant to be used as computer modules that are mounted on larger application-specific carrier cards. But Qseven modules are even smaller than Com Express modules and can fit on PC/104 carrier cards.




Most recently Congatec is promoting the conga-QA6 for usage in CAN (controller area network) applications. CAN was originally conceived as a control-network for automotive applications and is now also widely used in industrial automation. The E6xx-based Qseven module marks the first time Congatec has supported CAN on Qseven. Indeed the Qseven specification has been revised to version 1.2 to designate previously-reserved pins for CAN usage.


In the Congatec SBC, the CAN support comes courtesy of the Intel® Platform Controller Hub EG20T that is integrated alongside the processor. That I/O hub includes CAN support and is indicative of Intel’s continued push to expand the embedded-centric features available in its processors and chip sets.


Many embedded applications will match well with the features integrated in the Intel I/O hub. Still part of the beauty of the E6xx is that design teams now have the flexibility of choosing a different path toward implementing I/O. Design teams can move toward greater integration and lower cost by choosing features in an I/O chip that exactly match application requirements.

With the E6xx processor, design teams can leverage the PCI Express (PCIe) lane that Intel has used in place of the old front-side bus to connect a processor and an I/O hub. A team can either buy an E6xx-specific I/O IC from a third party that closely matches the requirement of their application, or they can even design a custom IC.


Kenton Williston wrote about custom I/O chips for the E6xx recently. In particular, the article described how you can use the Oki Semiconductor** ML7213 IC for automotive infotainment applications. The Oki chip is a closer match for such applications than is the Intel EG20T.


Oki has also announced another I/O hub for the E6xx. The company’s ML7223 I/O hub is targeted at telecommunications applications. Specifically the company has identified IP media phones as a target. The IC integrates I/O such as SATA and USB that’s required to boot the processor. The design includes a Gigabit Ethernet MAC and a hardware accelerator for IP-Sec applications. And it includes support for echo/noise cancellation that would enable IP phone applications.


STMicroelectronics has also announced that it will offer E6xx-compatible I/O ICs. The company has announced the ConnecXt IOH that targets automotive infotainment applications. For example, the IC adds support for the auto-centric MOST (media oriented systems transport) multimedia network to other features such as SATA.


Still the ultimate in integration and the ability to scale the E6xx into smaller form factors will come from custom I/O IC designs. That trend will also enable the lowest-cost bill of materials. Henry Davis covered some of this ground in a recent article on hardware and software development for custom I/O hubs. One problem that such a design presents is how to boot the processor. Once the I/O controller hub is gone there may be no way to connect to a boot device and no way to implement a BIOS.


ADI Engineering*** has developed licensable software and hardware that helps solve the problem. The company has a minimalist I/O hub implemented in a small FPGA along with boot-loader code to assist in custom designs.


Most recently, ADI Engineering has announced the latest version of its Cinnamon Bay SBC family that embedded design teams can use as a development platform for the E6xx processor.


ADI Engineering has a unique business model relative to other SBC manufacturers. The company sells SBCs that design teams can use off the shelf to deploy applications. But the company also pursues what it calls an Open IP approach in that it licenses the IP behind its modular products. Development teams can utilize the IP integrated in the Cinnamon Bay SBCs and embed that technology in custom designs.


The Cinnamon Bay EX SBC is due in the first quarter of 2011. ADI Engineering will offer versions that utilize the E6xx processor and Intel I/O hub, and what it calls the thin configuration based on the FPGA and boot loader mentioned previously.


Would the ability to utilize a custom I/O hub impact your design choices in applying IA processors to embedded systems? Please share your thoughts with the Intel® Embedded Community via comments. Are you doing your own custom SBCs or relying on off-the-shelf modular products? What are the key deciding factors in that choice?


Maury Wright

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance



* Congatec is an Associate member of the Intel® Embedded Alliance

** Oki Semiconductor is an Affiliate member of the Alliance

*** ADI Engineering is an Associate member of the Alliance

In a December 14th, 2010 E-cast entitled "Take your Design to the Next Level with Intel® Atom™” sponsored by the Intel® Embedded Alliance, experts from Advantech and Adeneo presented hardware and software details on the first Intel® architecture processor created specifically for embedded designs.


Curt Schwaderer, Technology Editor, moderated the event for OpenSystems Media. Speakers  were Charlie Wu, Product Manager for Advantech’s Embedded Single Board Computer Product Line and Joe Broxson, Senior Embedded Engineer at Adeneo Embedded.


Curt opened the E-cast by pointing out the wide range of embedded systems in use today and the one thing they all have in common: the need for higher performance and shorter development times. In response to these needs, Intel® has developed the Atom™ processor with a high performance level and flexible I/O while keeping thermal and board footprints within range for embedded requirements. Curt mentioned an ARC Advisory Group report naming the Intel® Atom™ as a key market driver for improving the performance of future embedded systems.


Charlie Wu of Advantech then presented a detailed description of the Intel® Atom™ processor E6xx series including features such as low power, scalable performance, flexible I/O, extended temperature, and a large software ecosystem. Charlie noted that the E6xx series is available in a wide range of off-the-shelf modules and industrial PCs to simplify and shorten embedded design projects. He also presented technical information on two new Advantech modules designed around the E6xx series: The SOM-6764 COM Express 95 x 95 mm module with type 2 pin-out for compact/rugged applications and the PCM-9364 3.5” single board computer for vehicle, signage, and industrial control applications.


Next, Curt introduced a pre-recorded video entitled “Getting to Market Quickly with Windows Embedded Standard 7 and the Intel® Atom™ Processor E6xx Series” hosted by Joe Broxson of Adeneo Embedded on behalf of Microsoft. During the video presentation Joe demonstrated the startup and customization options available with Windows Embedded Standard. He went through the step-by-step process necessary to create a custom firmware image for a digital signage application. The Windows Embedded development toolset allows the designer to pick from predesigned templates or create a completely unique software configuration.


Register to view the archived event with slides, video, and audio at After the presentations, the question and answer portion of the E-cast began with panel discussion of questions submitted by the attendees. Joining the speakers for this session was Joe Sunga, Application Manager for Advantech. Following are excerpts from that session:


CS: Are there certain board form factors that are better or standard for certain embedded markets? For example, is there any advantage to using COM Express vs. PC/104?

CW:  There are a few different form factors that Advantech offers in single board computers such as the PC/104 in 3.5 inch and also 5 ¼ inch. The COM Express is more for custom design purposes. You can use COM Express for virtually anything that you want to design. We have seen vehicle computers, medical applications, and embedded signage applications using COM Express. The PC/104 in particular, or that interface connection, is more for traditional Industrial control or ruggedized applications like transportation applications. It is also very popular for machining applications.


CS: So if I needed a board for some kind of reference design, I could take a COM Express board from Advantech and use that for software development. Is that an option?

CW: Yes, that is an option. With the COM Express board, we also offer a standard carrier board that you can use to do your development on and it will come with most of the standard PC I/O functions.


CS: OK, and is that how I would add my own I/O to the board if I need I/O interfaces that didn’t show up on it?

CW: Once you have been developing your application software using the carrier development board then you can either start doing your own design using the carrier board that you like using the form factor and functionality, or Advantech will also help develop the carrier board for you if you specified.


CS: What if I need 64 bit support for my embedded application. Is that available?

JB: Yes, it is available with Windows Embedded Standard 7 and you just have to take the same precautions that you would with the desktop, meaning that you have to insure that you have all of the correct 64 bit drivers. But once you have done that you can use both 64 and 32 bit applications on the Windows Embedded Standard system.


CS: In terms of the build environment that we saw in the video, do users have the option of activating specific devices?

JB: Here you are talking about Windows activation. When you buy a new version of Windows and install in on a computer, it ask you if you would like to activate using a key. With Windows Embedded Standard 7 there is no product activation. You are issued a key from Microsoft when you sign up for licensing and you use that key when you create your image. If you use that key when you create the image, there is nothing else to do. You simply create the image, deploy it, and then you work with a licensed distributor to purchase stickers that you apply to your devices and those stickers are the license.  You don’t have to do activation like you would with the retail version of Windows that you bought off the shelf.


CS: They say they make their devices for a regulated industry. Does the tool chain integrate with source control?

JB: Yes, it is very common if you are in a regulated environment making devices that have to be certified for FDA or for other areas, you need to make sure that your systems are controlled as far as change control. With Windows Embedded Standard 7 it is very easy to do that. We have this thing called a distribution share which is simply a directory that contains all the different components, or packages that you can apply or use within your system as well as drivers or other things. That entire directory can be checked in as source control as well as your project files that define which different files packages or settings are included in your device. So it is extremely easy to do source control with Windows Embedded Standard 7. This is a large improvement over previous versions of Windows Embedded Standard.


CS: What is the status of the Windows 7 support for the Advantech boards? Are the drivers ready specifically for the E6xx series and your circuit boards and how much off the shelf software is there for the Advantech form factor?

JS: Based on Intel®’s roadmap, most of the drivers are available for Windows 7 but some of them are not including the graphic driver. That’s currently still in beta stage and what they are predicting is that everything will be ready by early 2011.


CS: There’s a question about Bluetooth and its importance to things such as in-car applications. Does the Atom™ support that and are the drivers there or does the developer have to worry about creating their own drivers to enable the I/O that they need?

JS: Basically, the Atom™ does not support Bluetooth but it has a bunch of I/O expandabilities through the PCI Express bus where someone could actually use a Bluetooth adapter with PCI Express and they could develop their drivers for that. Or if they are actually using an IOH there is also the option of using the UART.  They could interface their Bluetooth through the serial bus and the drivers would be inherent to the serial bus. I think there are also seven USB 2.0 ports on there so you could also interface through USB.


CS: Another I/O capability that you mentioned was CANbus. What is that I/O capability for and where can they get more information on CANbus.

CW:  The CANbus has been used mostly in the vehicle applications and more recently we found that the CAN bus has been used in medical applications as well. My understanding is that the CAN bus is used for communications on specific measurements on vehicle sensors. We currently have PC/104 modules specifically to support CANbus. And of course the great thing with the Atom™ E6xx processor is that we can now start supporting CANbus directly on the board.


CS: Here’s a question about video and resolution and frame rates planned to be ported onto the E6xx platform for both encoding and decoding.

JB: I can answer on the software side. There is no limitation imposed by Windows 7 and I turn it over to Advantech to answer for the hardware side.

JS: There is basically a display controller that utilizes the Atom™ graphics engine and from there the controller will support 18 bit and 24 bit single channel LVDS. The maximum resolution is 1280 x 768 at 60 Hz or you can utilize the SDVO output which has a maximum resolution of 1280 x 1024 at 85 Hz. And if you are talking about frame rate for video encode that can be done at up to 720p at 30 frames per second using the H.264 codec or MPEG-4. Other codecs can actually be done up to 1080p at 60 frames per second and 720p at 60 frames per second.


CS: Regarding the iManager and the SUSI interface from Advantech, can you give a flavor for the kind of service APIs that are available and what functions they offer. And what kind of operating systems are available for it? Can you run Linux, Windows 7, and other embedded operating systems?

CW: First I would like to answer that the iManager is an embedded controller to monitor the system input voltage and other power management signals like S3, S4 and then accurately program and control the power on sequence logic for the chipset. That makes the power sequencing more accurate and also makes the power on more reliable. It also has additional features such as watchdog timer, hardware monitor, and GPIO controlled SMBus. The SUSI on the other hand is the software interface for the iManager at this point. The features include the monitoring portion which I mentioned: watchdog timer, hardware monitor, and hardware control. The control portion is SMBus, I2C Bus, and GPIO. The display portion includes brightness control, on/off control, etc. Currently the operating system support that we have is Windows XP Embedded. Soon we will have Windows 7 or Windows 7 Embedded. It also supports Windows CE and Linux.


CS: Why should we use the Windows 7 Embedded operating system instead of the desktop Windows 7?

JB: The primary reason that people prefer the Windows 7 Embedded Standard is that it is broken down into these packages where you can only pick the portions of the OS that you need. You can actually create an operating system image that is as small as 600 megabytes. However if you are going through the OEM channel and using the standard OEM OS image it is upwards of 16 gigabytes because of the items that it includes. You get other options for customization such as the unbranded startup screen as well as other embedded enabling features mentioned in the video. In addition, the licensing cost is typically lower for the Embedded Standard than it is for full OEM SKUs or the desktop retail SKUs. The other benefits there include the lack of activation. You don’t have to activate each device. You just have to put your key in once and download the image to a thousand devices and you are ready to go. Another reason is that you don’t have to use the Windows shell. As you saw in the demo, there is no startup; it starts with what you want to see in your embedded application.


CS: In terms of things that users know and love from Windows such as the Winsock API, and standard Windows APIs for graphics: Are those available on Windows Embedded and how hard is it to take a Windows desktop application and port it to Windows Embedded?

JB: The difficulty in porting is minimal. The API set is identical however the operating system is broken down into these modules that have to be selected. So as long as you have all the dependencies that are required then your application will just run. For example if you have an application the uses the .NET Framework 3.5 you have to include that in your image.


CS: Current design requirements are for RAM on a single board computer. Does Advantech have and E6xx board with both RAM and flash included on the SBC? If not, is there a way to get Flash through an I/O interface?

CW: Regarding the design requirement on the memory on the SBC, currently the 2.5 inch single board computer and the PC/104 form factor computer we have CFast design, not on board, but through a CFast socket. At this moment we do not have a product that has both memory and flash on board but this is something that we can investigate.


CS: Are there default builder packages that you can plug into the Windows Embedded environment. So if I want an Advantech SBC part number xyz, I could load it into this builder and take in or out the components that I want or do I need to build this up myself?

JS: Depending on the Advantech model number and software, say for Windows Embedded Standard 7, we have a board support package that can be worked through so you can get an idea of what kind of components are utilized on that board. And from there if a custom design were needed, then you could basically depopulate what components that you do not use. That board support package has everything for the components that are on the Advantech board. On some boards we have an expansion slot and if the designer adds something there he would have to add to the board support package.

JB: The way it works with Embedded Standard is that we have a tool that will analyze the target and identify what drivers are needed on it and so on. What you can do is take the output file from that and import it into the tool and then do your minimal configuration. Just the things you need to get the OS booted. There is a component called eCore that goes along with that. You have eCore and all the drivers required and you save that as a template. The templates were shown on the left in the video. You can actually save that project as a new template. And by doing that it gives you the ability to use that as a starting point. Let’s say you were working with a specific board then you would save that base model as a template and whenever you want to start on a new project you would just start up the tool, load up the template for that board. On top of that you can load the template for some sort of display device or set top box or whatever you are trying to create. You just load the template on top of that and go ahead and build it. Creating a custom template is no harder than creating a project. You just save that project in the right place and it becomes a new template.


CS: If you have a board with multiple configurations, how do you handle that in a template environment?

JB: There are multiple ways to handle that. Just ensure that all of the drivers for all the different components are available in the image. It is a bit of an advanced step as to how the phases work but you would simply specify that all of those drivers would be added during this off line servicing phase. All of the drivers are on the hard drive, so that whenever the device comes up, any other components will be recognized during plug and play and then they will be available on the system. Then you have your base image with all these optional drivers that are also available on the system when you install that image. If the hardware is there it will automatically be installed by the Windows installer the first time the image boots.


CS: Can you give a few more details on how to create and install a custom splash screen for branding purposes.

JB: There are two pieces to it. The first is the standard boot screen and you can go with the Windows flowering screen if you like or you can switch it to a black screen like I did in the video. The one piece that you didn’t see in the video the way I had it configured is a second screen that comes up. Now that second screen is typically the log on screen and you have the ability to add a package to your image that allows you to change the background and all the things seen there with your own.  You would supply a PNG file that would become the background and all the Windows messages would appear on top of that. You have a lot of control over that startup process and what you see there.


CS: For Advantech. What are the I/O hub options? Are there any third party companion chips if they are needed?

JS: Intel® developed the chip codenamed Topcliff which is essentially the EG20T. That is what they utilize for the I/O hub on this. The I/O has two SATA II ports, seven USB 2.0 ports, a gigabit Ethernet, one CANbus, one I2C, and one SPI bus. It also has eight general purpose I/O ports, four UARTs and also options for two SD or MMC interfaces. Intel® does not normally certify third party I/O but there are IOH vendors out there such as OKI Semiconductor, STmicroelectronics, and Realtek. The thing makes it easier for this processor is that there is no front side bus. It just uses a standard PCI Express bus so you can basically install anything using that standard.


CS: In terms of the 1080 HD video, via the SDVO, is there any documentation available to support this design requirement?

CW: At this moment, I am not aware that there is a readily available document, however we do have reference designs where we take SDVO and we turn that in various signal outputs including LVDS, HDMI and also DVI-D. So as long as the video output can support the 1080p and we have a reference design available to our customer who wants to make a custom design we can provide the 1080 SDVO video support.


CS: How do you use the video encoder/decoder hardware on the board?

JS: I know for video decode, the application software must be compliant with GStreamer or MPlayer framework. The application must use the API provided by those frameworks to utilize a video decoder. For video encoding, the application must also be compliant with the GStreamer framework.

JB: Windows 7 does provide the same encoding and decoding pipelines on the embedded as it does on the others. So as long as the device drivers and the codecs that take care of handling hardware acceleration are available for a piece of hardware, then Windows 7 can absolutely take advantage of it.


CS: Is Advantech doing any boards with Tunnel Creek only and no Topcliff or any other OIH solution?

CW: At this moment, for the single board computers, functional in PC/104 form factors, we don’t have that offering because it is more general purpose and they will all come with Topcliff, the EG20T which is the I/O hub. However, we do have the computer modules for the SOM product line in work and we will have a couple of products in the future to support the Tunnel Creek only or E6xx series only without the Topcliff IOH.  Basically the Atom™ E6xx series can stand alone and IOH is usually required to provide lower level functions. The IOH at this moment provides connectivity to storage solutions, the USB client functions, CANbus, I2C, and the general purpose I/Os. If the customer is developing portable applications, they will usually want to incorporate the storage connectivity such as SD, SDIO, or the MMC card. It is not necessary to add an EG20T or a third party I/O hub unless one of the functions mentioned are required for the application.


Warren Webb
OpenSystems Media®, by special arrangement with Intel® Embedded Alliance


Advantech is a Premier member of the by Intel® Embedded Alliance.  Microsoft is an Associate member, OKI Semiconductor is an Affiliate member, and Adeneo is a General member of the Alliance. 

Military and aerospace designs have long relied on VME, and (more recently) its successor VPX.  But developers now have the option to use AdvancedTCA* (ATCA) and MicroTCA (uTCA) in their rugged designs.  Which choice is better?   This blog will look at the pros and cons of VME/VPX and ATCA/uTCA.  It will explore the best uses for each standard and highlight example products for each.


Let’s start by reviewing the current state of affairs in commercial off-the-shelf (COTS) mil/aero markets. Figure 1 illustrates the market size of various COTS technologies.  Note that VME & VPX remain by far the largest markets, but the ATCA and uTCA markets are growing at significantly faster rates.


COTS Computing Solution


2010   (projected)

Growth   2007-2010





Compact PCI (cPCI)




AdvancedTCA (ATCA)




PCI with passive backplane




MicroTCA (uTCA)




Figure 1. Mil/aero market sizes for COTS computing technologies in millions of USD. (Source: VDC Research Group via Radisys)


Much of the growth of the ATCA and uTCA markets can be attributed to emerging requirements for high-performance equipment.  Figure 2 shows how various COTS standards map to key mil/aero market segments.  As shown in this figure, ATCA and uTCA are well suited to high-performance applications such as image processing and command center applications.



Figure 2. Mil/aero market segments served by COTS suppliers. (Source: Radisys)


At the same time, VME and VPX are not going away any time soon, and these established technologies can address many of the same markets as ATCA and uTCA.  Deciding which technology to use requires a careful analysis of the strengths and weaknesses of each.  In this blog we can only scratch the surface of this question.  To dive deeper, I recommend the Radisys white paper When High Performance Really Matters in Military/Aerospace.


For our brief overview, let’s start by reviewing the genesis of the competing standards.  The development of VME and VPX has been driven primarily by the needs of mil/aero markets.  As a result, these standards offer many mil/aero-friendly features that are not found in ATCA systems.  For example, VPX systems are available with liquid cooling, a feature that is rare (although not unheard of) in ATCA and uTCA systems.  For that matter, the entire VPX ecosystem—which includes not only hardware but also supporting software, services, and so on—is heavily focused on the needs of mil/aero applications.   This focus can make a big difference in reducing time to market and in meeting tough certification requirements.


In contrast, ATCA and uTCA are driven primarily by the needs of telecom markets.  In the past this would have been a handicap for ATCA, but as the battlefield becomes increasingly wired, the needs of mil/aero markets are converging with the needs of telecom applications.  Thus, ATCA and uTCA are well suited to the needs of communications-centric mil/aero applications.  On the other hand, the specialization of VPX makes it a better choice for many traditional mil/aero markets.


Another factor to consider is interoperability.  ATCA was created specifically to ensure interoperability between different manufacturers’ hardware.  In contrast, interoperability has been a sticking point for VPX.  The OpenVPX (VITA 65) interoperability framework ratified earlier this year should help matters considerably.


From a technical perspective, there are a number of important differences between the standards.  As shown in Figure 3, many of these differences relate to the size of the systems: ATCA boards are larger and (generally) have greater power budgets than VPX boards.  Keep in mind that ATCA and VPX systems have multiple blades, so a simple blade-to-blade comparison does not tell the whole story.


Key Considerations



Board Size

6U: 233 x 160 mm

Area: 373 cm²

8U: 355.6 cm x 280 cm

Area: 996 cm²

Board Power Consumption (max)

115 watts at 5 V (12 V and 48 V options also   available)

200 watts

Backplane Technology

1 Gbps, moving to 10 Gbps

1 and 10 Gbps, moving to 40 Gbps

Adoption of Standard



Figure 3. Technology comparison. (Source: Radisys)


To illustrate the advantages of each approach, let’s consider two example systems.   On the ATCA side we have the new C2 Server developed jointly by Radisys, LCR Electronics, and Astute Networks.  This 6U server is said to be the first pre–integrated, portable ATCA platform for rugged, ground mobile mil/aero applications.  The C2 Server supports up to eight Intel® Xeon® processor 5600 series server-class processors. Virtualization through VMWare ESXi allows the server to use multiple operating systems for application consolidation, while VSphere 4.0  support enables fault tolerant configuration of the various operating systems.  Other key features include:


  • 6-slot 6U AC chassis ruggedized to meet the MIL–STD–810 specification
  • Two 10G switches, each supporting 5x10GbE uplinks and wire speed L2/L3 switching
  • Dual- and single-socket processor boards
  • iSCSI storage blade with capacities of up to 3TB per slot and support for Solid State Disk (SSD), Serial Attached SCSI (SAS) and Serial ATA (SATA) hard disk technologies


Representing VPX we have the SVME/DMV-1905 from Curtiss-Wright Controls.  This 6U board targets demanding storage, data logging and sensor processing applications.  It features:


  • A 2.53GHz Intel® Core™ i7 processor with Intel® SSE 4.2 support for excellent floating point performance
  • Up to 8GB of DDR3 connected directly to the processor for a peak throughput of 17 GB/s
  • Up to 8GB of Flash
  • Ruggedization according to AC 0, 100, CC 100, 200


Whichever technology you chose, it is clear that COTS technologies are here to stay.  I am confident that both VPX and ATCA will continue evolving to meet the needs of mil/aero markets.


Radisys is a Premier member of the Intel® Embedded Alliance.  Curtiss Wright Controls Embedded Computing is an Affiliate member of the Alliance.  Astute Networks is a General member of the Alliance.



Kenton Williston

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance


Embedded Innovator magazine

Over the last five years, the COM Express* has become a popular standard for modular system design.  Now the PCI Industrial Computer Manufacturers Group (PICMG*) has released the second revision of the standard to support new graphics and displays technologies, eliminate older interfaces, and better match the features of today’s processors.  The new standard, officially known as PICMG COM.0 R2.0, also introduces a new 95 x 95 mm COM Express compact form factor.


Before looking at the new pin-outs, let’s briefly review the existing pin-outs, which are carried over in the new standard.  Pin-out type 1 uses a single A-B connector, which has 220 pins.  It supports up to eight USB 2.0 ports, up to four SATA or SAS ports, and up to six PCI Express* Gen1/ Gen2 lanes. It also supports dual 24-bit LVDS, Intel® High Definition Audio, Gigabyte Ethernet, and eight GPIO pins. Pin-out type 2 uses the same A-B connector as type 1, but adds a second C-D connector for a total of 440 pins.  The second connector adds support for PCI Express Graphics (PEG), a 32-bit PCI interface, and IDE ports for legacy PATA devices.   Figure 1 illustrates the type 1 and type 2 pin-outs.



Figure 1 (click to enlarge). The type 1 pin-out uses the A-B connector shown here, while the type 2 pin-out uses both the A-B connector and the C-D connector. (Source: PICMG)


Pin-out types 3 through 5 offer variations on the type 2 I/O.  Specifically, type 3 reassigns the IDE pins to create additional Gigabit Ethernet ports, while type 4 reassigns the PCI pins for use as PCI Express lanes.  Type 5 combines the changes in type 3 and type 4, so that the IDE and PCI pins are both reassigned.  Figure 3 summarizes the legacy pin-outs.




PCI Express Lanes






Up to 6





A-B, C-D

Up to 22





A-B, C-D

Up to 22



Up to 3


A-B, C-D

Up to 32





A-B, C-D

Up to 32



Up to 3

Figure 2. Legacy COM Express pin-outs.  (Source: COM Express Source)


The new type 6 pin-out in COM.0 Rev. 2 is also a modification of the type 2 pin-out.  In this case, the PCI pins are used to support digital display interfaces (DDI) and to bump the number of PCI Express lanes up to 23 lanes.  The DDI consists of three ports that can be configured individually as HDMI, DVI, or DisplayPort. DDI port 1 additionally supports SDVO. SDVO was already available in the type 2 pin-out, but it was multiplexed with the PEG port.  With new type 6 pin-out, SVDO and PEG use different pins, making it possible to use an external PEG graphics card in conjunction with SVDO for applications with more than four screens.  In addition to the graphics interface changes, the IDE interface is now reserved for future technologies such as USB 3.0 and SATA Revision 3.0 (also known as SATA 6 Gbit/s).


The new type 10 is a single-connector pin-out intended for compact modules.   As shown in Figure 3, this new pin-out is based on the older type 1 pin-out.   The main changes are that the number of SATA ports shrinks from four to two, and the number of PCI Express lanes shrinks from six to four.  The pins freed up by these changes are now reserved for alternative purposes such as USB 3.0. These better reflect the I/O in processors for small form factor systems.  For example, the Intel® Atom™ processor E6xx series and its I/O hub support two SATA ports and 3 PCI Express lanes. Type 10 also gains a DDI with support for HDMI, DVI, DisplayPort, and SDVO in place of the type 1’s secondary LVDS channel, TV out, and VGA support.  This change allows the type 10 pin-out to support dual displays.



Figure 3 (click to enlarge). The type 1 and type 10 pin-outs.


In addition to these changes, COM.0 Rev.2 adds serial ports to both type 10 and type 6.  The new standard also adds SPI ports for external boot support to the type 10, type 6, type 2, and type 1 pin-outs.  For more details on this and other changes in COM.0 Rev.2, see the Advantech COM.0 Rev.2 overview and the Kontron white paper COM Express* COM.0 Revision 2.0.


Leading vendors like Advantech and Kontron are already bringing out modules that leverage the new pin-outs.  For example, Advantech is previewing its SOM-5890, which will support the type 6 pin-out.  Features of this module will include:


  • COM Express basic form factor (95 x 125 mm)
  • Second-generation Intel® Core™ processor (previously known as Sandy Bridge)
  • 18/24-bit two-channel LVDS, HDMI, DisplayPort, and VGA
  • Dual-channel DDR3-1333 SO-DIMM sockets, up to 16 GB
  • PEG, PCIe x1, SATA Revision 3.0, USB 2.0, and Gigabit Ethernet


Another product to use the new standard is the Kontron nanoETXexpress-TT.  This module uses the type 10 pin-out and offers features including:


  • COM Express* ultra form factor (55 x 84 mm)
  • Intel® Atom™ processor E6xx series
  • Support for industrial temperature range (-40°C to +85°C)
  • Onboard E2 SSD Flash drive up to 8 GB
  • Gigabit Ethernet, 6x USB 2.0 and 1x USB Client
  • 2 x SATA and 1 x micro SD card slot


I anticipate that many other vendors will bring out COM.0 Rev.2 products in the next few months.  I look forward to seeing what innovations these modules bring with them!


Advantech and Kontron are Premier members of the Intel® Embedded Alliance.



Kenton Williston

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance


Embedded Innovator magazine

We’re less than a month away from the annual Las Vegas Consumer Electronics Show (CES) and the expected arrival of Intel® Architecture (IA) processors based on the new Sandy Bridge microarchitecture. The better news for embedded systems designers is that they will also get access to the Sandy Bridge architecture in short order. And the second generation of the Intel® Core™ processor family will include numerous enhancements such as ECC memory support, improved Intel® Turbo Boost Technology, and a new set of SIMD instructions called Advanced Vector Extensions (AVX) that will prove very valuable for segments of the embedded market.


Let’s start with ECC or Error Correction Code technology that is useful, and in some cases required, for mission critical applications such as those depicted below. ECC technology allows a system to detect and correct what are called soft errors where a data bit is inadvertently flipped from one state to another.



DRAM memory can be susceptible to soft errors. The term soft error is used because there is no permanent damage to the memory cell. Rather the change in a bit cell is caused by a single-event upset. Possible causes include alpha particles, cosmic rays, thermal neutrons and other radiation sources.


Many applications aren’t impacted by soft errors. For example, such a bad bit would not be noticeable in a graphics image or video stream. Most PCs don’t require ECC.


Embedded applications in the military, aerospace, financial, medical, gambling, and telecommunication segments often utilize

ECC. Such applications require higher levels of data integrity and guaranteed system uptime, and ECC helps enable those attributes.


The Sandy Bridge ECC technology will be capable of detecting and correcting one bad bit in a memory word, or detecting two bad bits in a word. Like the prior-generation Nehalem microarchitecture, Sandy Bridge integrates the memory controller on the processor IC. The ECC implementation will require that eight additional data signals and one additional data strobe be added to the 64-bit memory bus.


ECC support will not be in every Sandy Bridge processor. Embedded designers will find support in all of the Sandy Bridge processors shipped in BGA 1023 packages that are derived from processors developed for the mobile space. ECC will also be supported on processors in LGA packages that are derived from processors developed for the workstation space.


While ECC is focused at data security, other new features push the performance bar. For example, Intel has significantly enhanced Turbo Boost Technology. The first-generation Turbo Boost Technology allowed one core on a multiple core processor to temporarily run at a clock frequency above the rated frequency. As I covered in a Turbo Boost post earlier this year, the concept allows a core to temporarily apply additional processing power to a compute-intensive task. The first-generation Turbo Boost technology essentially allowed the overclocking of one core so long as the processor was within TDP (thermal design power) limits from the total chip perspective.


Second-generation Turbo Boost technology will provide a much more significant performance boost. Multiple processor cores will now be able to operate at an extended frequency. Moreover the graphics subsystem that’s integrated on chip is part of the story (see figure below). When the task at hand is graphics intensive, the frequency of the graphics processor can be ramped for better performance. When the task at hand is compute intensive the TDP headroom goes to one or more processor cores.



Another performance improvement comes in the form of the AVX instruction set. Intel has a long history in supporting math-intensive applications with a specialized SIMD (single instruction multiple data) instruction set. The company has developed four prior generations of SSE (Streaming SIMD Extensions) instructions that augment the baseline X86 instruction set. Moreover processors that support the SSE instructions have hardware-accelerated blocks designed to execute the instructions.


The AVX extensions will increase the compute power significantly. While the Nehalem SSE used 128-bit SIMD registers, AVX will utilize 256-bit registers. The extension supports floating point applications. Moreover AVX introduces a new three-operand instruction format that does not overwrite one of the source operands with results.


AVX will allow an IA processor to handle DSP-oriented functions that have previously required a companion FPGA or DSP-oriented coprocessor. Examples include medical imaging and telecommunications. In many communications applications, equipment vendors will be able to scale performance purely with off-the-shelf Sandy Bridge processors rather than designing custom data-path silicon. And while the AVX technology is just coming to market, it has been discussed since 2008 and there

is already support for the instructions in operating systems such as Windows and Linux.


There’s a lot more to Sandy Bridge and even the topics covered here are worthy of a deeper dive. After the products launch expect to hear a lot more about the enhancements.


Have you started thinking about a Sandy Bride design? Do you use ECC in your systems? How have you implemented ECC support in the past and what are your plans going forward? Please share your experience with fellow followers of the Intel® Embedded Community through comments.


Maury Wright

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance

The new Intel® Atom™ processor E6x5C series includes an FPGA in the same package as the processor, enabling developers to couple custom I/O and hardware accelerators to the popular Intel® architecture.  (As shown in Figure 1, the processor and FPGA reside in the same package but use separate dies.)  This new processor, previously known under the code name “Stellarton,” targets applications in the transportation, energy, industrial control, medical, and military fields.



Figure 1. The Intel® Atom™ processor E6x5C series. (Click to enlarge.)


Pairing an FPGA with the processor significantly simplifies board layout and inventory management, as the FPGA enables a single board to adapt to multiple applications.  Packaging the FPGA and processor together can also lower the bill-of-materials (BOM).  For one thing, the integrated FPGA eliminates the need for an external I/O Hub (IOH).  In addition, many applications already pair a processor with an external FPGA.  For these applications, putting the FPGA in the same package is a natural evolution that saves board space.


Figure 2 illustrates the inner workings of the processor.  At the heart of this 37.5 x 37.5 mm device is the same Intel® Atom™ processor found in the Intel® Atom™ processor E6xx series.  In this implementation, the processor is available in speeds from 600 MHz to 1.3 GHz.   Notable components of the processor include an upgraded graphics engine, video encode/decode capabilities, display and memory controllers, and PCI Express* (PCIe) interfaces.  The processor supports Intel® Hyper-Threading Technology (Intel® HT Technology) for increased performance in multi-threaded applications.  It also supports Intel® Virtualization Technology (Intel® VT), which enables developers to consolidate multiple operating systems onto the processor.



Figure 2. Block diagram of the Intel® Atom™ processor E6x5C series.


The FPGA is an Altera Arria II GX that is programmed using standard Quartus II tools.  The FPGA provides over 60,000 equivalent logic elements (LEs), 3.125-Gbps transceivers, and 312 hardwired multipliers. The FPGA is fabricated in a 40-nm process with an emphasis on low static power, and like the Intel Atom processor, it can support industrial temperature ranges of -40 °C to +85 °C.  Figure 3 summarizes the FPGA features.


Adaptive Logic Modules (ALMs)


Equivalent LEs


M9K Memory Blocks/Mb


Total Memory (M9K + MLAB in Mb)


18-Bit x 18-Bit Embedded Multipliers




Maximum Transceivers


PCI Express Hard IP Blocks


User I/O Pins


Figure 3. FPGA features.  (Source: Altera)


The FPGA provides a high degree of flexibility for implementing custom I/O, including high-speed I/O.  For example, the FPGA supports LVDS connections with SERDES at up to 840 Mbps, and it supports a variety of memory interfaces including DDR3.  The FPGA is also a powerful resource for accelerating processing-intensive algorithms.    It is particularly useful for the digital signal processing (DSP) algorithms found in applications such as industrial control, medical, and military applications.  In many applications, implementing these algorithms in the FPGA instead of the processor can improve the power efficiency of the solution.  To get a sense of the DSP possibilities with an FPGA, I recommend checking out the FPGA benchmarks from research house BDTI.


For more technical details on the processor, see the Intel Atom processor E6x5C series product brief.   I also recommend reading our earlier coverage of the Intel Atom processor E6xx series for more details on the CPU half of this new device.


The first product to incorporate the new processor is the Kontron MICROSPACE* MSMST, shown in Figure 4.  This PCIe/104* single board computer (SBC) targets automation, medical, transportation, energy, military, and communications applications. It includes a 1.3 GHz Intel® Atom™ processor E665CT, up to 2 GB of soldered RAM, and two SATA and two USB 2.0 interfaces.  I/O can be expanded via the FPGA using validated IP cores for CAN-bus, serial interfaces (SPI Master / UART), PCI-Express, I²C and GPIO.  These optional interfaces are carried out on High-Speed Mezzanine Cards (HSMC) that connect to the bottom of the module.  The HSMC also offers Gigabit Ethernet, VGA or DVI, and audio outputs, and Kontron offers FPGA programming services for additional I/O options.



Figure 4. The Kontron MICROSPACE* MSMST.


An important point about this approach is that you get a highly differentiated product from an off-the-shelf solution.  Because the differentiation is done in software, you don’t need to worry about the long-term availability of hardware components.


The bottom line here is that combining the Intel Atom processor with an FPGA creates a flexible solution that can solve a number of common design challenges.   Among other benefits, the Intel Atom processor E6x5C series can enable custom I/O and hardware accelerators, simplify board layout, and lower the BOM.  So how will you put these benefits to use?


Kontron is a Premier member of the Intel® Embedded Alliance.  Altera is an Affiliate member of the Alliance.



Kenton Williston

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance


Embedded Innovator magazine

In the first two posts of this series, I covered techniques that you can use to “future proof” your embedded design and boost your graphics performance for signage and gaming applications. Now let’s look at an industrial automation application.


Industrial automation systems must interface with a wide range of I/O requirements including proprietary legacy circuits and the latest high-speed interconnects.  Because of the longevity of industrial equipment designers must frequently interact with multiple generations of technology. For example, it is not uncommon to find the 4-20mA analog current loop standard for instrumentation used alongside Ethernet and wireless interconnection technologies in older industrial settings. Although this dichotomy of I/O requirements has made it difficult to combine them all into a single industrial automation platform, the latest Sandy Bridge microarchitecture from Intel® gives designers a new modular framework to boost performance, lower power requirements, and enhance I/O flexibility.




Sandy Bridge, the codename for Intel®’s latest Core™ processor family microarchitecture, combines a variable number of CPU cores, Last Level Cache (LLC), a system agent, and an optional integrated graphics processor. The System Agent is the heart of the I/O system for Sandy Bridge and includes 16 PCI-Express 2.0 lanes, Direct Media Interface (DMI), a dual-channel memory controller, and the display engine. The System Agent connects to the rest of the Sandy Bridge components by way of a ring interconnect to provide a high-bandwidth, low-latency interface to both DRAM and I/O.  This ring concept allows Intel® to add or remove the graphics processor and adjust the number of cores to deliver Sandy Bridge variations that reduce system cost and power requirements, while boosting performance.


The System Agent provides a flexible I/O configuration for industrial automation platforms allowing designers to easily modify functionality as requirements change. For example, Sandy Bridge includes a 16-lane PCI Express port that is compliant with the PCI Express Base Specification, Revision 2.0 and is capable of bifurcating into narrower links. Bifurcation allows the system to divide a larger PCI Express port into multiple smaller ports without a PCI Express Switch. The 16 lanes can be bifurcated into two x8 ports, one x8 port and two x4 ports, or four x4 ports. Combined with a chipset such as the Intel® series 6 family, the combination can also produce a wide range of I/O such as Serial ATA revision 3 at 6 Gb/sec, PCI Express 2.0 at 5 GT/sec, up to 14 USB 2.0 ports, and multiple display outputs including HDMI, DVI, VGA, DP, LVDS, and Intel® SDVO.


Industrial automation platforms normally operate in fully automatic mode in a factory production environment and without a local operator.  Addressing this type of application, Sandy Bridge provides compatibility with Intel®’s vPro technology allowing designers to access, control, and reconfigure a remote embedded system. vPro includes Intel® Active Management Technology (Intel® AMT) with certificate-based security for remote access regardless of the operational status of the system. This technology provides industrial automation support teams an economical method to monitor, manage, and control a large number of production platforms from a central location.


When embedded systems designers are faced with combining legacy platforms with a state-of-the-art high speed, possibly real-time control application, virtualization becomes an option. With multi-core software virtualization technology, such as TenAsys Corporation's INtime or Wind River’s Hypervisor combined with Intel® Virtualization Technology for x86 (VT-x), designers can join multiple, real-time processes without having to establish priorities between deterministic processes. Virtualization allows designers to integrate older operating systems along with their existing applications with minor changes while employing the latest tools and software for new development.


Depending on the function, some newer industrial automation applications require demanding floating point calculations to speed signal processing functions. Sandy Bridge incorporates Intel®’s new Advanced Vector Extensions (AVX) instruction set to optimize high speed calculations.  Although the AVX data path has been increased to 256 bits to accommodate demanding floating point processing, it is backward compatible with all previous x86 ISA (Instruction Set Architecture) extensions. With the AVX extended performance, you can potentially eliminate external hardware-based digital signal processing circuitry to reduce the component count and lower overall power requirements.


Industrial automation designers should investigate Sandy Bridge for their next project to take advantage of the scalable multi-core architecture and flexible I/O features.  You can find more information about new Sandy Bridge features and enhancements from the embedded presentation at IDF. If you are ready to start an industrial automation project please share your Sandy Bridge concerns, questions, and successes with fellow followers of the Intel® Embedded Community. Also, there is more to come as I cover the new Intel® Open Pluggable Specification (OPS) that defines a standardized module to ease the integration of digital signage components.


Warren Webb
OpenSystems Media®, by special arrangement with Intel® Embedded Alliance


Wind River Systems is an Associate member of the by Intel® Embedded Alliance. TenAsys Corporation is an Affiliate member of the Alliance. 

Hardware emulation facilities are an essential part of developing, debugging, and validating software for customized Intel® Atom™ processor E6xx chipsets.  The standard E6xx chipset includes an Intel Input/Output Hub (IOH) that provides the essential mechanism to provide boot load capability for the processor. But the standard configuration is not the only way to make an E6xx-based system operate.


ADI Engineering (1) offers a standard two-chip compact board based on the E6xx processor and associated Hub. But ADI took an alternative approach to building boards using the Atom processor. Unlike previous Intel architecture processors which relied on the Intel-proprietary Front Side Bus (FSB) to interface with the companion chipset, the E6xx processor uses the open PCIe bus interface between the processor and the rest of the system. That openness provides the basis for a different spin on low cost systems developments.


The one factor that stops the E6xx from being a single chip solution is the lack of a boot mechanism inside the processor chip. Instead, the Intel Hub provides that function. But the standard Hub chipset has a lot of functionality that isn’t required for dedicated designs like digital signage (see my blog on digital signs ).




Furthermore, such applications often don’t use the flexibility of a full BIOS, either.


The ADI Engineering design for “thin single chip” digital signage and other applications that don’t require a full BIOS could reduce  BOM costs for a dedicated function system. For larger volume applications that cost savings can be significant both for the manufacturer and customer. But with that specific cost reduction technique goes the functionality of some development tool choices.  For example, the lower end of software debug tools commonly relies on BIOS functions to provide the needed infrastructure to run the debugger. That infrastructure may be eliminated with the single-chip, low cost approach.

Looking at the entire range of hardware and software-based products offers some insights into how and when the various hardware-centric debug and verification tools are best used.




For our purposes, portions of in-circuit-emulation and functional tests are relevant to hardware/software integration and software debug. Choosing from among the various standard product-based tools is a big job that is not straightforward. But there is one factor different about customized IOH replacement chipsets: engineers are no longer starting their hardware debug with known functional silicon for the customized chip. This is a bigger concern for an ADI management chip which drives memory access. At first glance, there should be no conceptual development difference between a customized peripheral and a custom replacement for the IOH However, if there is a problem bringing up the board then taking the first steps is more difficult because there is no known good mechanism to load and run basic debug tools. This circumstance argues in favor of planning a full suite of logic analyzer style hardware tools. These engineering aids allow signals states and transitions to be recorded and possibly used as triggers for additional analysis. Logic analyzers and signal probes were discussed in a blog on development tools <url>.

Developing alternate bootload images is one strategy for dealing with initial board bring-up, manufacturing test, and field service. In this approach the Thin E6xx processor software load is different during initial debug and in production. Providing there is enough room for a full customized BIOS image, the bootloader may load the larger and more complex BIOS for debug, and a separate reduced services version for production. Some systems may require a larger memory for loading a full BIOS image as compared to a production software load. Planning to potentially accommodate a special version of the board can save time and effort during initial bring-up, and provides for future flexibility by permitting larger memories to be used in the board if the feature set grows in size. 


ADI Engineering’s “Thin E6xx” simplifies the design of customized management chips through its OpenIP program.  On-board OS boot Flash using a low-cost ADI-developed LPC-to-NAND CPLD interface implements a mechanism to permit booting from a flash device without the size, cost, and complexity of a full IOH device. Users of the ADI OpenIP design for Thin E6xx devices are put at the same development point as engineers who choose to use Intel’s IOH. But, there may be software customization required if a full BIOS is required.


ADI has developed a suite of diagnostics that rely on either BIOS or their royalty free boot loaders developed using Intel Boot Loader Development Kits for the E6xx.  This code requires that the target hardware be correctly configured and initialized by the relevant boot loader, which of course requires that the boot loader be correctly implemented and validated before hardware bringup, validation and testing can begin.


BIOS is a strange piece of software that can create surprising difficulties. Complications can range from   the closed source nature of BIOS to the relative scarcity of experienced BIOS software engineers. According to ADI Engineering, BIOS becomes a relatively difficult critical path schedule constraint, often with limited visibility and control.  Identification and mitigation of early product bring-up issues can be hampered by ambiguity of cause between the boot loader, hardware and test application.


Hardware/software Integration hardware spans a wide range including breadboards using a base processor and custom hardware to JTAG-based emulators. The integration stage of systems development relies on emulation technology. JTAG is one of the most flexible and powerful technologies used to debug hardware/software interactions. This was the topic of an earlier blog, <url> but JTAG has a critical role for designers choosing to replace the IOH with a custom management chip.

Comparing E6xx to its predecessor Z5xx, the Z5xx processor and its System Controller Hub (SCH) were required in a system design. Since the Z5xx system memory controller and boot flash controller were both on the SCH, it was critical to attach a debugger to the SCH. This is especially important for board bring up and initial debug.  This tight coupling of the Z5xx processor and the SCH chipset as a two-chip CPU solution required tight JTAG coordination:


  • Both chips shared common "internals," and the JTAG ports of both the Z5xx and SCH were implemented with LVCMOS 1.05V I/O.  This allowed the JTAG ports on the two devices to be chained together and connected to an Intel Architecture debugger.


By comparison with the Z5xx, in an E6xx system the EG20T (IOH) has no functions critical to initial board bring-up.  Additionally, the IOH is interfaced via the PCIe port. Most debuggers allow you to probe the PCI bus, eliminating any compelling reason to attach a debugger to the IOH to assist in bring-up, validation or initial testing.


The IOH JTAG port also serves as a Boundary Scan port.  The IOH JTAG port is biased to 3.3V, so there is not a simple way to directly connect the E6xx and EG20T JTAG ports together on the board. For JTAG Boundary Scan tests, an additional test port is required in the tester. But, this is not a critical requirement for board bring-up or hardware/software integration testing.


The Z5xx generation of embedded low-power Atom chipsets required debuggers to support both the CPU and the SCH chips to facilitate initial board bring-up, validation and test.  But the E6xx architecture is different - there is limited need for the debugger to directly connect with the IOH.  JTAG voltage difference between the E6xx and EG20T require level shifters.  The main benefit of connecting the IOH and E6xx JTAG ports is to support boundary scan manufacturing test, but the extra level shifter cost can make this a questionable strategy. Instead, it is more cost effective to use a second JTAG port with built-in level shifters on the load board, if necessary, to accommodate Boundary Scan testing for the IOH.


The biggest implication of the foregoing discussion is the absolute open nature of the IOH functions. ADI Engineering recognized the implications of using the PCIe bus for interfacing with the IOH. The result is a single-chip  IA processor with low power and high performance.


Intel’s design choices ensure that most standard development tools will work with the E6xx processor. By opening the interface between the CPU and the IOH (or its replacement) Intel maintains compatibility with industry hardware and software development tools. That means Development Software and tools from Microsoft Corporation (2), Green Hills Software (3), Wind River Systems (4) and third party JTAG emulator vendors will work with the E6xx processor and IOH or a custom chip to replace the IOH.


With the ability to replace the full blown IOH with a purpose designed management chip, there’s no limit to what you can accomplish. You can start with a known good design for the management device from ADI Engineering, or roll your own from scratch.


What can you imagine for your next embedded design using the E6xx and a custom management device?




1.   1. ADI Engineering is an Associate Member of the Intel® Embedded Alliance

2.   2. Microsoft Corporation is an Associate Member of the Intel Embedded Alliance

3.   3. Green Hills Software is an Affiliate Member of the Intel Embedded Alliance

4. Wind River Systems is an Associate Member of the Intel Embedded Alliance


Henry Davis
Roving Reporter (Intel Contractor)
Intel® Embedded Alliance

In the first post of this series, I covered the overall Sandy Bridge microarchitecture and outlined techniques that you can use to “future proof” your embedded design. Now let’s look at a specific application.


Digital signage and electronic gaming are huge and growing industries that depend on embedded electronics, media processing, and complex software for success. In the latest incarnations, these embedded display systems must network with a remote server, interact with a user, and update multiple high definition screens at ever increasing data rates. Targeting these requirements, Intel® recently unveiled the 2nd Generation Intel® Core™ Processor Family, codenamed Sandy Bridge, to be produced using the latest 32nm process technology. This new architecture includes numerous media and graphics enhancements such as the integrated graphics processor for high definition hardware image decoding, the Intel® Advanced Vector Extensions instruction set for faster floating point capabilities, and a modular design to simplify upgrades. In this blog post, I will detail some of these Sandy Bridge features that you can use to shorten your next embedded signage, gaming, or similar graphics-based design.


One of the most significant features of the Sandy Bridge architecture is that the graphics processor is integrated on the same die with the CPU cores, Last Level Cache (LLC), and system agent/memory controller. All of these elements exchange data using a scalable ring interconnect system allowing the graphics processor to share the cache and memory controller with the CPU cores. The Sandy Bridge ring technology allows Intel® to adjust the number of cores and create variations that optimize cost, performance, and power requirements for a wide range of signage and gaming applications.  The graphics processor along with all of the CPU cores in the Sandy Bridge microarchitecture also support Intel® Turbo Boost Technology, where clock frequencies can be increased for short periods to handle heavy workloads.


The Sandy Bridge graphics processor is ideal for signage or gaming applications with optimized media architecture and programmability plus dedicated fixed function hardware for video processing. The graphics section is composed of an array of parallel execution units for 3D applications and hardware acceleration for high speed HD encoding/decoding of high definition video (See figure 1).  In order to maximize the throughput per watt, the graphics processor implements fixed function hardware in the 3D pipeline to replace programmable functions. The video processing section includes advanced logic for removing noise, sharpening, scaling, and color processing of video signals. Sandy Bridge also features a unified power management architecture where the graphics processor has a separate power plane and clocking so it can run at a different voltage than the CPU depending on the workload.

Graphics Block.jpg

Both digital signage and gaming applications require intensive floating point calculations to deliver the needed high speed graphics. Sandy Bridge incorporates Intel®’s new Advanced Vector Extensions (AVX) instruction set optimized for audio, image, and video processing. Although the AVX data path has been increased to 256 bits to accommodate demanding floating point processing, it is backward compatible with previous x86 ISA (Instruction Set Architecture) extensions. With the AVX extended performance, you can potentially eliminate external hardware-based digital signal processing circuitry to reduce the component count and lower overall power requirements.  With signal processing algorithms programmed in AVX code, future updates can be made with a software modification.


As signage and gaming systems step up their performance and functionality, the supporting embedded designs naturally grow in complexity. For example a flight information board in an airport terminal and many of the latest electronic gaming platforms now require multiple displays which can result in added circuitry and possible external graphics processors. To deal with this possibility, Sandy Bridge supports the Hybrid Multi Monitor mode providing simultaneous operation of the integrated graphics processor along with an external discrete graphics processor, providing for more than two independently-driven displays on a single system.


While gaming equipment and the latest digital signage systems, such as the DSS-7042 from Advantech, are interactive, both are usually deployed in remote locations away from a system operator thus creating security and remote management problems for the support team.  Addressing this situation, Sandy Bridge is compatible with an advanced version of Intel®’s vPro technology allowing designers to remotely activate, reconfigure, and possibly, deactivate a remote embedded system. vPro includes Intel® Active Management Technology (Intel® AMT) with certificate-based security for remote access regardless of the operational status of the system. This technology provides signage and gaming support personnel a low cost method to collect usage data, perform maintenance, and manage software updates.


Along with performance and power-saving improvements, Sandy Bridge delivers an optimized and programmable media architecture plus hardware-based video processing. These powerful graphics features give the embedded platform designer an ample toolset to establish new directions and create next-generation signage and gaming applications. You can find more information about new features and enhancements from the Sandy Bridge: Processor Graphics presentation at IDF. If you think that Sandy Bridge fits your next graphics related project or if you have already started a project please share your concerns, questions,  and successes with fellow followers of the Intel® Embedded Community. Also, there is more to come as I cover the flexibility and scalability of the Sandy Bridge I/O system plus the new Intel® Open Pluggable Specification (OPS) that defines a standardized module to ease the integration of digital signage components.


Warren Webb
OpenSystems Media®, by special arrangement with Intel® Embedded Alliance



Advantech, is a Premier member of the by Intel® Embedded Alliance. 

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