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2011

High performance military and aerospace projects such as radar and image processing call for commercial off-the-shelf (COTS) components that meet extreme multi-tasking and floating point processing requirements.  Even as embedded designers struggle to deal with these soaring data rates, increased processing requirements, and application complexity they are often forced to make tradeoffs to meet Size, Weight, and Power (SWaP) requirements in many rugged and mobile applications. To keep up with the latest requirements, COTS vendors must constantly search for new technology and update their board-level products to match the needs of multiple military and aerospace projects.

 

The Intel® 2nd Generation Core™ processors include a number of new or expanded technologies to enhance embedded designs destined for the military and aerospace COTS marketplace. In addition to the promise of long term availability, the processors feature increased performance and lower power while integrating the graphics processor to simplify and enhance the user interface. For example, all of the CPU cores (including the integrated graphics core) feature Intel® Turbo Boost Technology, allowing clock frequencies to scale up temporarily to handle intense workloads. The processors also include a new 256-bit instruction set called Intel® Advanced Vector Extensions (AVX), which is backward compatible with previous x86 ISA extensions and is optimized for vector and scalar data sets such as those found in military and aerospace signal processing applications. With this extended floating point processing power, board designers can boost performance and possibly replace external dedicated DSPs or FPGAs with AVX code to reduce the component count and lower overall power requirements. Supporting the new Intel® Core™ processors, several COTS vendors have already announced board level products with greatly improved performance per watt in both air and conduction-cooled configurations.

 

Targeting the high performance military and aerospace market, Extreme Engineering Solutions (X-ES) recently introduced the XPedite 7470, a conduction- or air-cooled VPX Single Board Computer (SBC) based on the 2nd Generation Intel® Core™ i7 processor. VPX is an extension of the venerable VMEbus form factor that replaces traditional parallel bus architectures with high-speed serial streaming communications. The new COTS module features the quad-core Intel® Core™ i7-2715QE processor with Hyper-Threading (HT) Technology to optimize parallel computations and up to 8 GB of DDR3 SDRAM. For I/O, the XPedite 7470 offers two x4 lane PCI Express backplane interconnects, two optional 1000Base-T Ethernet ports, two optional USB 2.0 ports, two optional SATA 3.0 or 6.0 Gb/s ports, and two DVI graphics ports. The 3U VPX module also includes a math and signal processing software library that takes advantage of the single instruction, multiple data (SIMD) architecture of Intel® AVX.

 

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GE Intelligent Platforms also integrated the Intel® 2nd Generation Core™ technology into a COTS module serving demanding embedded computing applications. Their new SBC624, a 6U OpenVPX single board computer, features the quad-core Intel® Core™ i7 processor running at up to 2.1 GHz to tackle extreme signal processing tasks in intelligence, surveillance, reconnaissance, radar, and sonar applications. OpenVPX defines a subset of the overall VPX specification to enhance interoperability among COTS vendor products.  The SBC624 features two PCI Mezzanine Card (PMC) sites and two switched Mezzanine Card (XMC) sites, while I/O includes two 10 Gigabit Ethernet ports, four RS-232 ports, VGA, two DVI/HDMI ports, seven USB 2.0 ports and two SATA interfaces.  The module is supported by a broad range of software including the AXIS Advanced Multiprocessor Integrated Software environment from GE Intelligent Platforms that shortens development times, reduces project cost and accelerates time to market.  Operating system support is provided for Microsoft Windows®, Linux® and Wind River VxWorks®. The SBC624 is available in five build versions from benign to fully rugged, and can operate in environments ranging from air-cooled to extremely harsh.

 

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These modules from GE Intelligent Platforms and X-ES are part of the recent product introductions based on 2nd Generation Intel® Core™ processor architecture that gives military and aerospace COTS board designers higher performance, lower power requirements, and improved I/O flexibility. Regardless of the board standard selected, an ample catalog of readily-available COTS modules are vital to the high-performance, embedded development process.  If you think that these or similar COTS modules fits your next military or aerospace project or if you have already started a project please share your experiences or questions with others in the Intel® Embedded Community. Also, stay tuned as I take a look at high-performance, remotely-operated embedded devices with graphical elements such as point-of-sale terminals, digital signage, medical appliances, and gaming machines.

 

Warren Webb
OpenSystems Media®, by special arrangement with Intel® Embedded Alliance

 

GE Intelligent Platforms, Microsoft, and Wind River Systems are Associate members of the by Intel® Embedded Alliance. Extreme Engineering Solutions is a General member of the Alliance. 

The ATCA (Advanced Telecommunications Computing Architecture) and smaller-form-factor µTCA (MicroTCA)  standards (collectively referred to as xTCA) for blade-based systems are increasingly popular in applications including telecommunications, military, and industrial automation. Embedded teams have a number of options for connecting multiple processors across xTCA backplanes and that choice can have a significant impact on realized system performance. PCI Express (PCIe) is often the best choice for maximum performance in multiprocessor systems. Moreover, Intel® Architecture (IA) processors natively support PCIe affording both flexibility and optimum performance in xTCA-based systems.

 

The ATCA and µTCA standards are promulgated by the PICMG organization that focuses on modular computing technology standards. Both were conceived as ruggedized platforms that allowed teams to build reliable, mission-critical systems based on standard products including backplanes, chassis, and the boards referred to as blades that carry the system functionality.

 

All xTCA systems also support the use of AMC (Advanced Mezzanine Card) modules that are typically used to implement the microprocessor and support chip complex. AMC cards are added to ATCA blades via a mezzanine connector as the name implies. In the case of µTCA, the AMC cards can be inserted directly into the backplane.

 

The xTCA specifications don’t specify the manner in which blade-to-blade or module-to-module communications are carried out. Instead the specifications allow the design team to choose the best approach by allowing Ethernet, Infiniband, RapidIO, and other choices along with PCIe.

 

Ethernet has been a popular choice as an xTCA interconnect fabric because of inherent software support. But Ethernet lacks the bandwidth of PCIe. Infiniband has been successfully used in storage-centric systems, but it lacks the flexibility of PCIe. Indeed design teams are finding that PCIe is the best choice in multiprocessor-based systems.

 

General Electric Intelligent Platforms* (GE) is one modular product vendor that is a proponent of PCIe in xTCA systems. The company has published two whitepapers on PCIe and xTCA. In “Implementing PCI Express interconnects in xTCA,” the company lists low latency, high data throughput, low CPU utilization, low implementation cost, and low power consumption as advantages of PCIe over Ethernet and Infiniband. The paper details typical architectures that might be used in industrial and medical systems (see block diagram below).

 

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The second paper,  “Designing multiple PCI Express processor nodes into xTCA host systems,” looks more deeply at how AMC technology has evolved to support multiple processors. The paper discusses how system designers can deploy multiple processors both as xTCA root complexes (masters) and end nodes. Moreover it covers the breadth of systems that use a dedicated PCIe switch to AMC modules that can essentially implement the switching function via port bifurcation when the system only requires three or four processor nodes.

 

GE supports PCIe in xTCA designs with products such as the Telum ASLP11 and ASLE11 AMC modules. The modules are based on Intel® Core™ 2 Duo processors and include as much as 4 Gbytes of DRAM along with AMC.2 (Gbit Ethernet) and AMC.3 (SATA interfaces). The designs can be used in a system with a PCIe switch. Alternatively the designs support PCIe port bifurcation allowing one master node to partition and group the 8 PCI lanes into four pairs with each connecting a processor on additional end-node modules.

 

Emerson Network Power Embedded Computing** also has a broad spectrum of xTCA and AMC modular products including the AdvancedMC Storage Modules that can act as carriers for rotating or solid-state hard drives. The company also offers the PrAMC-7211 module that integrates a Core 2 Duo processor and 2 Gbytes of memory.

 

Of course a system design also requires chassis and backplane components. Elma Electronic has a broad line of such products across many modular computing standards. The company web site allows you to quickly navigate to system platform and backplane pages for both µTCA and ATCA systems.

 

You might also be interested in modular alternatives to xTCA that also compete in the same communication, military, and industrial segments. Kenton Williston recently compared ATCA with the VPX standard that has a VMEbus heritage.

 

Please share you experience using a PCIe fabric as the basis for a high-performance system. Your insight would be greatly appreciated by fellow followers of the Intel® Embedded Community regardless of which xTCA or other modular standard that you experience comes from. Did you use a dedicated switch? Have you relied on port bifurcation? Contribute to the discussion via our comment facility.

 

Maury Wright

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance

 

* General Electric Intelligent Platforms is an Associate member of the Intel® Embedded Alliance

** Emerson Network Power Embedded Computing is a Premier Member of the Alliance

A lot of engineers seem to think that microprocessors and FPGAs are competitive technologies. In reality an Intel® Architecture (IA) processor and an FPGA from a vendor such as *Xilinx or Altera** can be complementary processing blocks in compute-intensive applications. Specifically, data-flow applications in communications, imaging, military, and medial fields benefit from the powerful combination of a processor and an FPGA. Moreover the IA affords design teams the opportunity to closely couple a processor and an FPGA to optimize the collaborative-computing approach.

 

Processors and FPGAs are in reality optimized for quite different types of processing. Processors offer the ultimate in flexibility. There is an incredible universe of software developers that can program IA processors and likewise untold numbers of tools and platforms that can help speed application development toward completion.

 

FPGAs are far more difficult to program requiring a team with the ability to create RTL code, synthesize that code, perform place-and-route, and verify the design. But an FPGA fabric is inherently capable of parallel processing. Moreover, designers can configure FPGAs to perform a sequential set of algorithms on parallel data streams that flow through the fabric. The generalized high-level block diagram of an FPGA from Xilinx depicts the potential for parallel, sequential processing.

 

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The combination of a processor and an FPGA can be quite powerful. Xilinx, for instance, defines some specific applications. In a military radar application, an FPGA can be dedicated to the compute-intensive beam-forming task while an IA processor handles the remainder of the system functions. FPGAs can perform tasks such as encryption in communications gear. And the parallel capabilities are a good match in implementing specific imaging tasks such as recognizing elements in a video stream.

 

There are a number of ways that design teams can combine traditional processors and FPGAs. For years the approach was board based. Either the processor and FPGA subsystems were on separate boards in a rugged system such as one based on CompactPCI. Or in a more PC-like environment, the processor was on the motherboard and the FPGA was hosted on a PCI or PCIe board.

 

Despite the advancements in system-bus performance realized in technologies such as PCIe, a close coupling of processor and FPGA enables greater performance and a wider range of applications. Intel has enabled that close link via the older FSB (Front Side Bus) that was used to link processor and core logic, and more recently via Intel® Quick Path Interconnect (QPI). QPI was introduced with the Nehalem microarchitecture and is now shipping in a variety of processors including the Intel® Xeon® 5500/5600 Processor series and some Intel® Core™ i3, i5, and i7 processors.

 

A system design that connects the FPGA directly with the FSB or QPI allows the FPGA to share memory access with the processor. That allows memory coherency and minimizes data transfers that were previously required to explicitly send and receive data to the FPGA subsystem.

 

At the Intel Develop Forum last fall, Xilinx demonstrated the combination of a Virtex FPGA and Xeon IA processors connected via QPI. The demonstration used what is referred to as in-socket accelerators implying that the FPGA is essentially a peer to the IA processor in a multiprocessor system.

 

The Xilinx demonstration relied on technology from Nallatech who offers a variety of ways to augment an IA implementation with FPGA technology. The company also supports FSB-based FPGA accelerators. Moreover, whether the FPGA is in an FSP or QPI socket, the implementation utilizes the Intel® QuickAssist Technology that includes an Acceleration Abstraction Layer (AAL) to simplify the software development process for an IA system augmented with an accelerator such as an FPGA.

 

Xilinx also has a whitepaper entitled “High performance computing using FPGAs” that coves the combination of processors and FPGAs. The paper focuses equally on sever applications and embedded application in the military, communications, medical, and imaging segments.

 

Altera has also supported in-socket accelerators. And the company has a whitepaper entitled “FPGA coprocessing evolution: sustained performance approaches peak performance.” The photo below shows a product from Altera’s partner XtremeData that packs three Stratix FPGAs on a module for an FSB socket.

 

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Intel has also integrated an Altera FPGA in the same package with an Intel® Atom™ processor in the E6x5C series that was code named Stellarton. That combination supports both SOC designs where an embedded teams uses the FPGA to implement specific peripheral functions and applications where the FPGA acts as an accelerator for specific functions.

 

Do you have experience matching processors and FPGAs in compute-intensive applications? Have you used an FSB approach or have you already deployed a QPI-based design? And have you relied on the QuickAssist AAL? Please share your experience via comments. Fellow followers of the Intel® Embedded Community would greatly appreciate your input.

 

Maury Wright

Roving Reporter (Intel Contractor)

Intel® Embedded Alliance

 

*Xilinx is an Affiliate member of the Intel® Embedded Alliance

**Altera is an Affiliate member of the Alliance

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