Standard Backplanes for PICMG 2.30 and CPlus.0

Version 1

    Author: Andreas Lenkisch, Principal Engineer Backplanes at Schroff GmbH, Straubenhardt, Germany



     

     

    Hybrid backplanes for CompactPCI Plus from stock

     

    PICMG 2.30 is an extension of the CompactPCI specification PICMG 2.0 and is currently undergoing a round of voting by PICMG.

     

    CompactPCI PlusIO extends CompactPCI with the aim of providing a soft migration path to the CompactPCI Plus (PICMG Cplus.0) specification, which is now based solely on serial protocols.

     

    The modern serial interfaces such as PCI Express, SATA, USB and Ethernet that are lacking on CompactPCI are provided by a CompactPCI PlusIO (PICMG 2.30) CPU on the user-defined pins of the P2 connector of a 32-bit CPU board. From here a hybrid backplane designed to CompactPCI PlusIO (PICMG 2.30) connects these signals to peripheral CompactPCI Plus slots.

     

    The P2 connector of the CPU board is compatible with its predecessor from the hard-metric series. This allows the CompactPCI PlusIO CPU both to be used in earlier 32-bit CompactPCI systems and to support new CompactPCI Plus systems.

     

    System manufacturers participating in the specification process will offer a number of typical configurations as standard backplanes or standard systems as stock items. For certain applications further configurations are certain to become standard products in order to also create a basis for small projects. The next step will be to define 'pure' CompactPCI Plus backplanes and systems.

     

    The illustrations show the existing configurations and those planned for the near future.

    • a hybrid backplane with 4 CompactPCI and 4 peripheral CompactPCI Plus slots
    • a hybrid backplane with 3 CompactPCI and 2 peripheral CompactPCI Plus slots plus a slot for a CompactPCI PSU (to PICMG 2.11 with "P47" connector)
    • a pure CompactPCI Plus backplane with 9 slots and
    • a pure CompactPCI Plus backplane with approx. 3-5 slots (still at planning stage)

     

    Dual CPUs with sideboard or mezzanine expansion module for CompactPCI Plus, that support the old parallel bus and also the new architecture on separate slots, do not require special backplanes. Off-the-shelf single CPCI and Cplus backplanes may be combined in any required configuration, with any combination of slots. Left: a backplane can be configured with 1 to 8 CompactPCI slots; right: a CompactPCI Plus-compatible backplane with 1 to 9 slots. Power backplanes with 1 to 4 slots allow the configuration to be rounded down for small quantities. For projects requiring larger quantities, however, it will be economically more effective to design a special monolithic backplane to the project's exact requirements.