User Specific I/O on CompactPCI® PlusIO

Version 1

    Author: Manfred Schmitz, CTO MEN Mikro Elektronik

     

    CompactPCI® PlusIO – PICMG 2.30 – not only brings PCI to the backplane, but also the state-of-the-art serial connections of a computer, such as PCI Express, SATA, USB and Ethernet. To do this, it uses a special but compatible high-speed connector. This so-called UHM (ultra hard metric) connector allows to use each pin for signals up to 5 Gb/s, without the need for additional ground pins. Every pin is individually shielded and is set up as a coaxial contact.

     

    PICMG 2.30 makes use of these features to bring as many of the above-mentioned interfaces as possible to the backplane. The definition of PICMG 2.30 uses up all user I/O pins, however. What are you supposed to do if you need other interfaces on the backplane, which are not specified by PICMG 2.30 - let's say graphics?

     

    The standard also permits to assign other functions to pins. So, if you do not need the defined four PCI Express, four SATA, four USB and two Ethernet interfaces, you can also lead other signals to the backplane and still be compatible with the standard. You only need to consider two things: First, you must keep the implementation order of the interfaces. This means that you cannot simply assign a different function to any PCI Express interface. Instead, you need to begin with interface 4 and continue in forward direction. With SATA the implementation order is the other way around - here you begin with the first pin that you can then assign differently. The second rule says that connected interfaces which comply with the specification must not be destroyed by user I/O signals. The standard does not permit, for instance, that the pins are assigned +12 V instead of a SATA interface, because this could destroy a connected hard disk drive.

     

    For example: Doing without one PCI Express interface and one Ethernet interface, we would like to bring LVDS graphics to the backplane. According to the implementation rules, we need to reassign Ethernet 2 and PCI Express 4 in this case. The output signals of the LVDS interface are differential, with a relatively low voltage level. These signals cannot destroy a connected Ethernet device. In the case of PCI Express, it is better not to drive against a connected device. Consequently, we should avoid using the PCI Express input pins. The following table shows a possible pin assignment.

     

    CompactPCI® PlusIO, PICMG 2.30, brings modern serial interconnects to the backplane without unnecessary limitations of flexibility. At the same time, the rules of the standard make sure that there is a maximum of interoperability between the boards of different manufacturers.