Case Study: Avoiding Bottlenecks, Snail Threads, and Pitfalls in RADAR Software

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    Facing the specter of parts obsolescence, antiquated computer architecture, and closed proprietary systems, the customer wanted a technology refresh that would facilitate the possible retrofit of several existing radar systems. For both the upgraded systems and new designs going forward, the customer desired open, portable technologies that would improve performance, increase reuse, and lower costs. They believed that by leveraging the development infrastructure, technology roadmap and investments of standardized Commercial Off the Shelf (COTS) vendors, they could achieve their hardware and software objectives.


    The challenge was to design an Application Ready Processor (ARP) consisting of processing hardware, operating system, and processor middleware for a podclass radar system using available off-the-shelf hardware. The ARP was required to demonstrate performance against a set of Synthetic Aperture Radar (SAR) and Ground Moving Target Indicator (GMTI) benchmarks, while meeting specified size, weight and power (SWaP) constraints. In addition to characterizing the currently available hardware, the customer wanted to quantify expected near term processing gains from the next generation of hardware. As part of the solution, the benchmarks could be optimized to improve performance, but the accuracy of the improvements must pass verification.


    Visit the Curtiss-Wright website to download the case study and  learn more about how the Intel Core i7 processing solution and OpenHPEC tool suite solved this challenge.