Today, modern sensors in all Intelligence, Surveillance, Reconnaissance (ISR) technology segments output more data than ever before. For instance, electro-optical infrared (EO/IR_focal plane arrays have far greater resolution and frame update rates than ever before. Radar phased arrays have higher element counts and higher I/Q bit depths on the egress. Signal Intelligence (SIGINT) systems have Radio Frequency tuners with wider instantaneous bandwidths and therefore higher throughput digitized IF at the output. Additionally, all of these sensors have higher density channel counts than previous generation sensors.
A customer familiar with this problem came to Curtiss-Wright Defense Solutions with the added compound problem of Sensor Fusion applications. These applications often see a firehose of data from each of these ISR segment sensors that aggregate to a single processing subsystem. In some cases, even existing solutions such as the Curtiss-Wright CHAMP-XD2 6U OpenVPX modules with 32 GB of DDR4 per each of two Intel Xeon D processor devices become memory bound. Despite 32 GB representing an enormous amount of capacity, there is so much sensor data throughput at the ingress of a processing module in a Sensor Fusion application; even this amount of DDR4 is insufficient to buffer the onslaught of data.