3 Replies Latest reply on Feb 5, 2018 8:09 AM by Carlos_A

    X540 SMBus

    rdebacker Green Belt

      I am bringing up a X540-BT2 design and noticed that shortly after reset that the SMBus Clock and Data line are driven low.

      The PCIe interface is not being driven - no reference clock.

      Is this an issue that has been seen by any other designers?



        • Re: X540 SMBus
          Carlos_A Brown Belt

          Hello, rdebacker:


          Thank you for contacting Intel Embedded Community.


          In order to better understand your consultation, we want to address the following questions:


          Could you please tell us if the affected project is a third party one or it has been developed by you? In case that it is a third party design, please give us all the information related to it. On the other hand, if it is your design, could you please let us know if it has been reviewed by Intel? Could you please inform us where is stated the information used to develop the affected project? How many units have been manufactured? How many are affected? And, what is the failure rate?


          Could you please inform us if the cited device is a Converged Network Adapter or it is an Ethernet Controller? Please give us all the information related to this Ethernet device.


          Could you please let us know where do you download the files related to this condition?


          Please let us know all the information that should answer our questions.


          Waiting for your update.


          Best regards,


            • Re: X540 SMBus
              rdebacker Green Belt


              The project is developed by us - Futurex.

              The schematics have not been reviewed by Intel.

              The design is based on the X540/I350-BT2 Reference Design and the Intel Ethernet Controller X540 Datasheet Revision Number: 3.0 Januaray 2015.

              (5) prototypes have been built and all units exhibit the same behavior.


              The question is in regards to the SMBus - not implemented in the Reference Design schematics.

              Shortly after reset and after download of the SPI Flash contents the SMBus Clock and Data signals drive low.  Both signals are pulled up on our design.

              I have tried a couple of flash images from the X540_Dev_Starter_4.50 zip file.  X540_MNG_NO_MNG_B0_4.50.bin and X540_MNG_SMB_B0_4.50.bin.

              If the X540 is powered without a programmed the flash the SMBus signals are not driven low.


              Our design is a custom COM-Express carrier board.  We have are waiting on the COM-Express processor modules that we have ordered.


              At this point in the debug, there is no PCIe reference clock or signaling - to be driven by COM-Express processor modules.

              This is a unique situation and not the intended design of our board.


              This question is specifically in reference to the Intel X540-BT2 Ethernet Controller.