I think I have figured this out. It declares an error if it
ever reads all ones, as happens when the MDIO target is
missing. I assume you get this error if you read a register
that really is all ones!
However, now I have the MDIO transfers working to
the 88E1111, I find I get a similar behaviour to that
I had with the 88E1512 parts. After the code runs,
the RJ45 link between PHY and the external switch
goes down. At power up, the link comes up. Is it
possible that there is a problem with the code that
sets up these PHYs. I realize that not many people
use the I210 with an external RJ45 PHY.
Thanks for your reply.
In order to better understand this situation, we would like to address the following questions:
Could you please tell us the Operating System (OS), driver version, NVM image use to talk to these external PHY?
Could you please inform us know how long are the traces to the PHY?
Could you please let us know the type of connection is being used?
Could you please confirm if this design has been looked by Intel?
These questions have been addressed to have more information of the design and usage model, in order to have a better idea of the problem and give you the proper information.
It is important to let you know that the 88E1111 is supported with our drivers, we have idea that the 88E1512 is unsupported. In case that you want to work with an unsupported device, you should build your own driver.
Thanks again for your collaboration.
The two I210 devices starting working on Friday.
Here is a summary of what we had to do:
We changed the Initialization control word 3 (0x24) from 0x4220
to 0x4224. This turns on the external MDIO mode. My guess
is the original used I2C with an SFP. We also had to update
The correct PHY address has to be specified in Flash word 0x13
(Initialization control word 4). This is probably relevant to
the other person having trouble with SGMII operation with an
SFP. (P 187 of the I210 manual)
There is a bug somewhere in the code that powers down the
PHY. This is the 0x800 bit in PHY word 0, for at least the
88E1111. We did the rude hack of adding the following to the
if (offset == 0 && (data & 0x800)) data ^= 0x800; // Rude hack
This solves the power down problem, if not very elegantly!
There is another, probably mostly harmless bug around line 275
and 334 of e1000_phy.c. This puts the PHY address in the register E1000_MDIC,
(0x20) (p 376), reserved area. For the I210, the PHY address
is stored in I210 register E1000_MDICNFG, (0xE04) (p 377).
The other effect of this is, if code elsewhere changes the value of
phy->addr, these changes will not get copied into E1000_MDICNFG,
so the address loaded from the Flash will continue to be used
for the MDIO transfers.
Our starting image was