Hello PVWB ,
Thank you for contacting the Intel Embedded Community.
We suggest you review that your implementation is unaffected by the erratum 55. This information can be found on pages 48 and 49 of the Intel(R) 82599 10 GbE Controller Specification Update.
Also, please review the information of the Specification Clarifications section, specifically the seventh point on page 17 of the listed Specification Update.
We hope that this information may help you.
We didn't see increments in the ILLERRC or ERRBC registers either,
we just saw transmission counts increase.
Is it possible that the EEPROM files turn on Rx lane swapping or
polarity swapping? It's wierd that we get link up but no data or errors
at all. The differential traces are only about 2" (50mm) long. We
have had XAUI work with other parts over much longer distances than this.
We found we had the polarity swapped on one of the lanes by
mistake. This can be corrected by setting a bit in the Marvell switch.
We now get data transfer in both directions. Marvell told us the
either polarity swaps or lane swaps result in this symptom of
link-up but no data transfers occur.