1 Reply Latest reply on Aug 4, 2016 9:25 AM by Carlos_A
      • Re: What is the differential impedance should be at the clock signal between memory DDR3L and the processor Intel Atom E3805?
        Carlos_A Brown Belt

        Hello Rustres,


        Thank you for contacting the Intel Embedded Community.


        It is important to let you know that the Customer Reference Board (CRB) (including its schematics) is a device that is designed at early stages of the platform implementation. So, it will omit modifications to the design that reflect the latest corrections to past issues and improvements of the design.


        Please always follow the latest documents such as the Electrical, Mechanical, and Thermal Specifications (EMTS); Platform Design Guides (PDG), Platform Schematic Design Checklist, and Datasheets (with addendums) since some things have been changed / corrected after the CRB was designed.


        We hope that this clarification may help you.


        Best Regards,


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