4 Replies Latest reply on Nov 3, 2016 10:33 AM by Brett

    e3805 and coreboot development guidance

    GrahamP Community Member

      Hi,

      I am looking for guidance on running coreboot on the intel e3805 processor and in particular a suitable development board. From reading the forum and various posts I understand the e3805 does not need the TXE binary in the flash image and therefore I can forget about verified images and signing. This would be beneficial since this is our first development with the atom chip and I want to avoid this complication. Am I correct?

       

      This work will be in preparation to the arrival of our own hardware design so any recommendations of a development board with the following would be appreciated:

      1. POST led.

      2. USB ports.

      3. externally accessible GPIOs.

      4. ethernet ports.

      5. eMMC NAND flash (16MB or more).

      6. DDR3L (1MB or more).

      7. COM1 port.

      8. XDP header.

       

      Many thanks,

      Graham Perkins

        • Re: e3805 and coreboot development guidance
          Carlos_A Brown Belt

          Hello GrahamP,

           

          Thank you for contacting Intel Embedded Community.

           

          Your consultation of this kind should be addressed to the channels listed at the Coreboot Mailinglist since these are specialized channels.

           

          We hope that this information may help you.

           

          Best Regards,

          Carlos_A.

          • Re: e3805 and coreboot development guidance
            johndoody Green Belt

            Hi Graham,

             

                I'm not sure if you were able to resolve your concerns by following the link which Carlos provided above but, if not, perhaps we here in Ircona (Ircona Home) should be able to help you.

             

                Ircona have been providing BIOS / EFI customization services for Intel based products for over 15 years and have supported Intel's introduction of first BLDK and now FSP/CoreBoot (Embedded) in their Atom class processors. We also have a very experienced Hardware design team which could assist you in the development of your motherboard.

             

                It is clear that the FSP/CoreBoot approach is the correct approach for many designs but it is useful to have a clear understanding of the full software feature set you wish to implement prior to the commencement of your project.  We have found that, sometimes, customers end up investing too much effort in trying to achieve some later functionality via coreboot which would have been straightforward with a BIOS implementation. As Ircona have expertise in both approaches, we can assist you in making the right choice at the start thereby minimizing your overall investment.

             

            We would be happy to discuss how we would be able to assist you.  Please feel free to contact me at sales@ircona.com or through our website Contact Ircona

             

            I look forward to hearing from you and can assure you that you will benefit from engaging my team

             

            Regards

             

            John Doody

            CEO

            Ircona

            • Re: e3805 and coreboot development guidance
              Brett Green Belt

              Graham,

               

              Sorry I didn't see this sooner. As someone who went through this pain 18 months ago I will make this recommendation: put the TXE image in there. You hopefully put an XDP connection on your hardware and if so it will not work without it. The JTAG chain will see the uncore device but not the x86. You do not need to sign the images or create a manifest. You need the TXE package anyway to get the Flash Image Tool which you need to set all the boot flags. I use the Slim version: 543572_BYT_I_SEC_SlimFW_PV_RELEASE. You will need to contact your FAE for it as I don't think it is available off the web site any more.

               

              And a heads up: granted I haven't spent much time on it but the latest coreboot is giving me an error on fsp_init. If I go back to my original coreboot from last year it works fine. And this is with the same FSP binaries linked in.

               

              Another possibility is a reference coreboot zip file that you can download if you have an Intel account. I wanted to baseline to it but whomever zipped it up converted tabs to spaces, or vice-versa. Either way I get an error from make on it when I do a 'make menuconfig'.

               

              Good luck with your project. If you have issues post them here and if it's something I also encountered I will let you know what I did.

               

              Brett