5 Replies Latest reply on Jan 30, 2017 7:44 AM by Carlos_A

    I am having problems with DIMM B on a Haswell processor based design.

    PVWB Brown Belt

      We have a design using a Haswell processor with one DIMM on

      each DDR controller.  DIMM A seems to work.  When using DIMM B

      the system fails to boot and sometimes fails in the BIOS.  We believe

      we have followed the recommendations in 490765_Intel_2013_Platform_SM-ATLC_Rev0p70.xlsm

      and the Intel document 486711/486712.  These were downloaded in 9-Mar-2016 and

      29-Jan-2015 respectively.  Have either of these documents been updated or have their

      contents been superceded by a Specification Update or other document?

       

      Thanks, Paul.