8 Replies Latest reply on May 21, 2018 7:20 AM by Carlos_A

    Access Xeon D 10G-KR PHY registers

    rksyeung Green Belt

      We use Xeon D in our latest hardware.  After reading and searching datasheet, Volume-4 for D-1500 Product Family, we'd like to inquire about the following -

       

      1. We would like to check 64B/66B PCS coding errors.  Presumably, this is defined among PHY registers.  Unfortunately we couldn't locate the register spec.  Could you please point out where we could get it (Intel document, or IEEE802.3 standard)?  Please provide enough details so we could get to the document.

      2. Are these registers accessed via PCIe address space via the PHY_INDIRECT access DATA/CTRL registers (0x11144, 0x11148), or MDIO (clause 45?)?

      3. There is a mentioning of PHY register bit 3.8.B, or 3.EC00.F.  How should we interpret each of the (apparent) 3 data fields?

       

      Thanks,

      Raymond

        • Re: Access Xeon D 10G-KR PHY registers
          Carlos_A Brown Belt

          Hello, rksyeung:

           

          Thank you for contacting Intel Embedded Community.

           

          In order to be on the same page, could you please give us the SKUs and part numbers of the processors related to your questions?

           

          Could you please tell us if your design has been reviewed by Intel?

           

          Could you please let us know the name of the company that you are working for?

           

          Waiting for your answers to these questions.

           

          Best regards,

          Carlos_A.

            • Re: Access Xeon D 10G-KR PHY registers
              rksyeung Green Belt

              model name:  Intel Xeon CPU D-1527 @ 2.20GHz

              Microcode: 0x700000d

              Stepping:  3

               

              My question pertains to the internal of Intel's processor internal registers.  I work in software group, so I'm not sure if the hardware design has been reviewed by Intel, though don't know why this is relevant.  I'm not asking about any issues we encounter at this point at board level, such that unapproved design could cause problem.  The question is about some PHY registers referenced in Intel's data sheet that couldn't be found within such data sheet.

               

              I'm also not sure why the company I work for is relevant here either.  Perhaps I'd filed it as part of my personal profile when I signed up for this community.  If not, I'd like to keep this private at this moment.  I could respond to you in private if this is absolutely necessary.

               

              Thanks,

              Raymond

              • Re: Access Xeon D 10G-KR PHY registers
                rksyeung Green Belt

                Incidentally, the PHY I refer to is an internal (to Xeon-D's 10G controller) PHY.  You could reference Figure 15.1 of the data sheet for D-1500 Product Family (volume 4).  My questions are not concerned about external components/interfaces.

                  • Re: Access Xeon D 10G-KR PHY registers
                    Carlos_A Brown Belt

                    Hello, rksyeung:

                     

                    Thanks for your updates.

                     

                    In order to help you, we will contact you via email.

                     

                    Best regards,

                    Carlos_A.

                    • Re: Access Xeon D 10G-KR PHY registers
                      gabriel.thomas Brown Belt

                      Hello, Raymond,

                       

                      Please refer to the document number 546625 - Broadwell Server - BIOS Writer's Guide (BWG).

                       

                      The BIOS mailbox commands are:

                      rerer.png

                       

                      Section 4.3.3.2 - Write_PCS (0x02): This command functions as a BIOS interface to the PECI mailbox WR_CTRL_TABLE command.

                      As input, BIOS passes the PCS command and address in the ADDRESS field of the INTERFACE register.

                       

                      post.JPG

                      code.JPG

                      code2.JPG

                       

                       

                      Section 4.3.3.3 - Read_PCS (0x03): This command functions as a BIOS interface to the PECI mailbox RD_CTRL_TABLE command.

                      As input, BIOS passes the PCS command and address in the ADDRESS field of the INTERFACE register. As output, Pcode passes the value/result of the requested read in the DATA register.

                      The return data and error codes are the same ones that would be returned by the PECI mailbox for the provided command and data.

                      read.JPG

                      read2.JPG

                       

                       

                      RdPkgConfig() command provides read access to the package configuration space (PCS) within the processor, including various power and thermal management functions. Typical PCS read services supported by the processor may include access to temperature data, energy status, run-time information, DIMM temperatures and so on.

                      The RdPkgConfig() format is as follows: Read/Write Length: 0x05.

                      Command: 0xA1

                      For further details please check doc 527063 - Platform Environment Control Interface (PECI) for Broadwell Processor - Implementation Guide.

                      Section 3.4.1 - Command Format.

                       

                      WrPkgConfig() command provides write access to the package configuration space (PCS) within the processor, including various power and thermal management functions. Typical PCS write services supported by the processor may include power limiting, thermal averaging constant programming and so on.

                      The WrPkgConfig() format is as follows: Read Length: 0x01; Write Length: 0x0A; Command: 0xA5; AW FCS Support: yes.

                       

                      For further details please check doc 527063 - Platform Environment Control Interface (PECI) for Broadwell Processor - Implementation Guide.

                      Section 3.5 - WrPkgConfig ().

                       

                      Please refer to Sections, Doc 544040 - EDS Vol 1

                      9.3.2 - Power and Thermal Optimization Capabilities Package Config Space (PCS).

                      9.3.3 - Register and State Dump Package Config Space (PCS).

                      Table 43 - RdPkgConfig () and WrPkgConfig () PCS SoC and Dram Optimization Services Summary.

                       

                       

                       

                      Regards,

                       

                      Gabriel Thomas G.

                        • Re: Access Xeon D 10G-KR PHY registers
                          rksyeung Green Belt

                          Hi Gabriel,

                           

                          Thanks for the BIOS information.  However, what I need is not this.  I'm anticipating a need to do debugging (at PHY level) in Linux environment.  Please review my very first post here.  I found IEEE 802.3 Specification covering Clause 45 register space.  However, I'm not clear if Intel fully complies with it, and whether the vendor-specific section has information we want.

                           

                          Finally, I attempted to download document 546625, but got "Not Authorized to Access" when I provided same credential I used for this embedded community.  If you're to provide any further downloadable document, what do I need to do (get another Intel account) to get access?

                           

                          Thanks,
                          Raymond

                    • Re: Access Xeon D 10G-KR PHY registers
                      johndoody Green Belt

                      Hi Raymond,

                       

                         Ircona are a world leading design services company specialising in x86 hardware and BIOS design.  We have completed a number of projects based on the Intel Broadwell-DE and would be more than happy to assist you in resolving your issues. Please contact me at john.doody@ircona.com if you would like to discuss this further.

                       

                      Thanks

                       

                      John Doody

                      CEO

                      Ircona