21 Replies Latest reply on Jul 5, 2018 6:35 AM by Carlos_A

    Ethernet Compliance Test I210-AT 10Base-T/100Base-TX

    Andrija Green Belt

      Hi

       

      I want to run Ethernet Compliance Tests 10/100Mbps with I210-AT.

      Are there any information available? I can not find anything in the datasheet.

      E.g. create 100Mbps MLT-3 Random Test Pattern.

       

      I can only find Test Mode Register Bits (15:13) in 1000Base-T Control Register (Page 0, Register 9) for Gigabit.

       

      What is the purpose of 100 MB test select bits 3:2 of Copper Specific Control Register 3 - Page 0, Register 23 ?

      What can I do with the PRBS Control - Page 26, Register 23 ?

       

      Thanks for your help

      Andrija

        • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
          Carlos_A Brown Belt

          Hello, Andrija :

           

          Thank you for contacting Intel Embedded Community.

           

          The information that may help you is stated in sections 3.7.8.1.2, 4.5.7.2.2, 4.5.7.2.3, 8.2.1, 8.17.2, 8.25.12, 8.27.3.1, 8.27.3.5, 8.27.3.15, and 8.27.3.30; Figure 3-16, and Table 10-21; on pages 115, 147, 378, 479, 480, 548, 553, 556, 557, 563, 114, and 673 of the Intel(R) Ethernet Controller I210 Datasheet document # 333016.

           

          We hope that this information may help you.

           

          Best regards,

          Carlos_A.

            • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
              celinel Green Belt

              Hello Carlos,

               

              I work also with the i210 component and I search to perform the ethernet compliant test to 10/100BASE-T too. I've just subscribe myself in when I saw your post.

              I looked at the chapters you refered to in your reply, but it's still not clear to me how to enable a test mode pattern generation.

              I found inside the datasheet "12.5.7 Physical Layer Conformance Testing"  that for "Output Amplitude, Rise and Fall Time (10/100 Mb/s), Symmetry and Droop (1 GbE). For the I210,

              use the appropriate PHY test waveform."

              Where are the  "test waveform" for the 10/100 Mb/s? it's not described inside this datasheet. Should we generate them outside of the component? there is only a Test mode for the 1000BASE-T, do the component have a similary mode for the speed lower?

               

              I have another component on my product which use a TI PHY -DP38xx, and they have a document which explains how to configure the component for conformance testing, do you have something close to this document ? (http://www.ti.com/lit/an/snla239a/snla239a.pdf )

               

              For the testing tools we have a Teledyne/Lecroy automated Ethernet test suite on which we directly plug our DUT and run the conformance test.

               

              Thanks for pointing me in the right direction.

               

              Celine

              1 of 1 people found this helpful
            • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
              celinel Green Belt

              Can someone help us on this subject please?

              I tried to contact the support through  the customer support and they closed my ticket by telling me to create another ticket from here :

              https://www.intel.com/content/www/us/en/design/resource-design-center.html

               

              Andrija and I are still waiting for a support on the compliance test topic!

               

              Thanks....

               

              Celine

              1 of 1 people found this helpful
              • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                Andrija Green Belt

                IEEE 10Mbps Tests:
                • Setup For All patterns – This needs to be done before sending packets with the listed payload below for each test. Ensures the link is forced up so packets will send and that no other 100/1G test modes are running.
                o Write MDIO Phy Register 0x10, Turn off bit 10
                o Write MDIO Phy Register 0x1A, Turn off bits 2 and 3
                o Write MAC Register 0xE14, Turn off bit 5
                o Write MDIO Phy Register 0x10, Turn on bit 10
                o Write MDIO Phy Register 0x16, Set value to 0x6
                o Write MDIO Phy Register 0x10, Set Value to 0x0
                o Write MDIO Phy Register 0x16, Set Value to 0x0
                o Write MDIO Phy Register 0x0, Set Value to 0x0
                14.3.1.2.1 - Peak Differential Output Voltage on TD Circuit (Amp 5MHz) – Send 1500 Byte Packets containing AA pattern as the packet payload.
                14.3.1.2.1 - Peak Differential Output Voltage on TD Circuit (Amp 10MHz) - Send 1500 Byte Packets containing FF pattern as the packet payload.
                14.3.1.2.1 - Harmonic Content, All Ones Signal - Send 1500 Byte Packets containing FF pattern as the packet payload.
                14.3.1.2.1 - Differential Output Voltage Template - Send 1500 Byte Packets containing Random data as the packet payload.
                14.3.1.2.1 - TP_IDL Waveform Output – Perform setup, do not send any packets. There should be an idle pulse always on after setting register 0x0 to 0x0.
                14.2.1.4 - RD Circuit Differential Input Impedance (Rx Return Loss) – Perform setup, do not send any packets. There should be an idle pulse always on after setting register 0x0 to 0x0.
                14.3.1.2.2 - TD Circuit differential Output Impedance (Tx Return Loss) – Perform setup, do not send any packets. There should be an idle pulse always on after setting register 0x0 to 0x0.
                14.3.1.2.5 - TD Circuit Common-Mode Output Voltage - Send 512 Byte Packets containing Random data as the packet payload.
                14.3.1.2.3 - Transmitter Output Timing Jitter with Cable Model - Send 1500 Byte Packets containing Random data as the packet payload.
                14.3.1.2.3 - Transmitter Output Timing Jitter without Cable Model - Send 1500 Byte Packets containing Random data as the packet payload.

                IEEE 100Mbps Tests:
                o Setup to be done before setting any patterns
                o Write MDIO Phy Register 0x10, Turn off bit 10
                o Write MDIO Phy Register 0x1A, Turn off bits 2 and 3
                o Write MAC Register 0xE14, Turn off bit 5
                o Write MDIO Phy Register 0x0, Set value to 0xA000

                9.1.2.2 - UTP Differential Output Voltage – Should see 112ns wide pulses
                9.1.4 - Signal Amplitude Symmetry
                9.1.6 - Rise/Fall Times
                o Write MDIO Phy Register 0x1A, Turn on Bit 3

                9.1.5 -Transmit Return Loss – Should see random idles data
                9.1.9 - Transmit Jitter
                9.2.2 - Receiver Return Loss
                o Write MDIO Phy Register 0x1A, Set Value to 0x0

                9.1.8 - Duty Cycle Distortion (DCD) – Should see 16ns pulses
                o Write MDIO Phy Register 0x1A, Turn on bits 2 and 3

                IEEE 1Gbps Tests
                Setup for all patterns
                o Write MDIO Phy Register 0x0, set value 0x9140 – This sets it to Gigabit and resets the adapter.

                40.6.1.2.1 - Peak Differential Output Voltage (Test Mode 1)
                40.6.1.2.2 - Maximum Output Droop (Test Mode 1)
                o Write MDIO Phy Register 0x9, set value 0x3B00

                40.6.1.2.4 - Transmitter Distortion (Test Mode 4)
                40.8.3.1 - MDI Return Loss (Test Mode 4)
                40.8.3.3 - MDI Common-Mode Output Voltage (Test Mode 4)
                o Write MDIO Phy Register 0x9, Set value 0x9B00

                40.6.1.2.5 - Transmitter Timing Jitter (Test Mode 2)
                o Write MDIO Phy Register 0x9, Set value 0x5B00

                40.6.1.2.5 - Transmitter Timing Jitter (Test Mode 3)
                o Write MDIO Phy Register 0x9, Set value 0x7300

                1 of 1 people found this helpful
                  • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                    Carlos_A Brown Belt

                    Hello, Andrija :

                     

                    Thanks for your reply.

                     

                    We are glad that you have found the proper information to solve this inconvenience since you consider your previous communication as the useful and correct answer.

                     

                    Please do not hesitate to contact us if you have more questions related to Intel Embedded devices.

                     

                    Best regards,

                    Carlos_A.

                    • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                      celinel Green Belt

                      Hello Andrija,

                       

                      I looked at the registers you described in the last post. As I don't have the access yet to the privileged access to read the document Carlos_A quoted, I have some question about the registers you mentioned.

                      If I undestand well, the MDIO PHY registers are the ones in the i210 datasheet §8.27.3. but I have some difficulties to find the equivalent registers.

                      Here is what I think it may corresponds to, can you tell me if this is correct?

                       

                      10Mbps :

                      o Write MDIO Phy Register 0x10, Turn off bit 10  --> Page 0 Register 16, bit 10 to disable the copper link good

                      o Write MDIO Phy Register 0x1A, Turn off bits 2 and 3 --> this one I cannot match with neither Page 6 Register 26 nor Page 26 Register 26

                      o Write MAC Register 0xE14, Turn off bit 5 --> PHPM register

                      o Write MDIO Phy Register 0x10, Turn on bit 10 --> Page 0 Register 16, bit 10 to force the copper link good

                      o Write MDIO Phy Register 0x16, Set value to 0x6 --> Page address Register 22 to set the page to 6

                      o Write MDIO Phy Register 0x10, Set Value to 0x0 --> page 6 Register 16 ? I did'nt understand why we set all bits to 0, there will be no packet generation for the test

                      o Write MDIO Phy Register 0x16, Set Value to 0x0 --> Page address Register 22 to set the page back to 0

                      o Write MDIO Phy Register 0x0, Set Value to 0x0 --> Page 0 Register 0, I am confused with value 0x0 because this will set the link to 10Mbps but in HALF duplex mode

                       

                      Thank you for your help and the knowledge sharing.

                       

                      Celine

                    • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                      celinel Green Belt

                      Hello Carlos_A., Andrija

                       

                      I am still waiting for the CNDA to be granted, still no feedback at all. I sent e-mail to Janella Ruth from the support team, and she's checking the status of my request.

                      By the way, I tried the test with the information Andrija wrote 4 weeks ago and I made the tests. But I didn't use the register at the address 0x1A, what works for me to generate pseudo-random pattern for the 100Mbps test are the following registers :

                      Set the duplex and speed fixed without autoneg : page 0 reg 0

                      Set copper port packet generator page : 6 reg 16  bit 3, 2 and 1

                       

                      I'll make the 10BASE-T test today and let you know.

                       

                      Thank you, both of you, for your help.

                       

                       

                       

                      • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                        celinel Green Belt

                        Andrija, Carlos_A,

                         

                        I've tried the procedure you sent the 6th of June and unfortunately it doesn't work for me for the 10BASE-T compliance test at all. Even for the TP_IDL test there are no idle pulses. I followed the setup settings (I read the initial value and then write with the corresponding bits):

                         

                        o Write MDIO Phy Register 0x10, Turn off bit 10 ->> I set it to 0x3360 (same value than the read one)

                        o Write MDIO Phy Register 0x1A, Turn off bits 2 and 3 ->> I set it to 0x0400(same value than the read one)

                        o Write MAC Register 0xE14, Turn off bit 5 ->> I set it to 0x0000008d (same value than the read one)

                        o Write MDIO Phy Register 0x10, Turn on bit 10 --> I set it to 0x3760

                        o Write MDIO Phy Register 0x16, Set value to 0x6 --> change the page to page 6

                        o Write MDIO Phy Register 0x10, Set Value to 0x0 --> I set value 0x0 to the register 16 of page 6

                        o Write MDIO Phy Register 0x16, Set Value to 0x0 --> change the page back to 0

                        o Write MDIO Phy Register 0x0, Set Value to 0x0 --> I set it to 0x0 (even if I don't understand why we configure the link in 10Mbs HALF duplex, Do we need to use a link partner?)

                         

                        Nothing happens on my captured signals, the TP_IDL test is failed as all the others.

                         

                        I'am really stucked for these tests, and still don't know where my NDA request achievement. I think that my company already have one with Intel(we use a lot intel components on different projects), but I don't know how to find it.

                         

                        Andrija, have you made the test yet?

                         

                          • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                            Carlos_A Brown Belt

                            Hello, celinel:

                             

                            Thanks for your update.

                             

                            Please inform us if you still need our support through this channel, since Andrija usually prefers to contact you via email.

                             

                            Best regards,

                            Carlos_A.

                              • Re: Ethernet Compliance Test I210-AT 10Base-T/100Base-TX
                                celinel Green Belt

                                Hi Carlos_A,

                                 

                                I have been in touch with the IoT market responsible in France, and normally we will call each other for this problem of compliance test. We indeed have a valid NDA so I'm waiting for the priviledge access to read the document you cited before.

                                In the meantime, I think I succeed to test the i210 with a link partner, and I didn't use at all the previous configuration, I just wrote into Page 0 reg 0 to set the speed at fixed 10Mbps Full Duplex mode, and I accessed the Page 2 register 21 to set the bit 14 in line loopback mode. I still have some failed results, and I don't know if it's due to my test setup or my board routing, so I'm analyzing these results.

                                I still want some formal document from Intel to approve the way I tested the component because we develop aeronautical product and this mean formal testing and certification.

                                 

                                Thank you if you have further information about this component testing.

                                Thank you also Andrija for your help.

                                 

                                Regards,

                                Celine