At the beginning of advanced initialization, profiling for boot times is optionally initialized. The “CFG_PROFILE” is enabled in either the make file or in the IDE tool.
Advance init flow:
■Checkpoint 28h, Miscellaneous Internal Devices:
(1) US15W Chipset Specifics (IDE controller enable , set the APIC ID of the IOAPIC to not conflict with any processors.)
(2) DMA service
(3) Programmable Interrupt Timer (PIT) - legacy timer frequency is 18.2Hz, the refresh rate is 66.3 KHz, and the speaker frequency set to 400Hz.
(4) Super IO : You will likely need to rewrite your own solution
(5) Serial Console Enable : If you want see message from host terminal
(7) Timer : Initializes the system timer, installs a protected mode handler for the timer interrupt, and unmasks the timer interrupt. (IRQ0)
(8) Reserve memory region : Video memory and TSEG memory ( CPU can direct read/write this buffer memory forSMM)
(9) HD audio
These Miscellaneous things in the system must be configured in the boot loader for proper operation. This will be unique for every chipset. FOr more details please check BLDK porting guide about each stage functional Points to be made on the edc.intel.com
Hope this will help.