1 Reply Latest reply on Oct 19, 2012 8:34 AM by Felix_M

    Atom E6xx CLK-DQS skew

    Community Member

      cb Hello,

      We are busy with the pcb layout for a Atom E6xx with 8 loads memory.

      I am now confused about the length matching between the clock (CLK) and stobe (DQS) lines.

       

      In the datasheet 433311_Rev3.0.pdf on page 36 is mentioned:

      The total length of DQS of each byte group must be greater than or equal to CLK + 0.15 in., and must be less than or equal to CLK + 0.5 in.

       

      If I then look at the guideline 325550.pdf (Intel® Atom™ processor E6xx Series – Memory Design Optimization for Small Form Factor), I see on page 23:

      The total length of DQS of each byte group must be greater than or equal to CLK - 0.3 in., and must be less than or equal to CLK + 0.2 in.

       

      What should I use for the length of the DQS line matching to the CLK?

       

      Thanks!

       


        • Re: Atom E6xx CLK-DQS skew
          Felix_M BlackBelt

          Hello

           

          I  want to make you aware of a special place to go with questions like   yours.  The Intel® e-Help desk is staffed by Intel representatives who support select Intel embedded platforms including Intel® Atom™ and  associated  chipsets.

           

          To access e-Help, you need to be a Privileged member of the Intel® Embedded Community.

          If you are not already a Privileged member, you can request an upgrade to your community account here:

           

          https://edc.intel.com/My-Account.aspx

           

          In addition to access to e-Help, Privileged members may also access the confidential content within the Intel® Embedded Design Center, such as design documents, specifications, and training materials.

           

          I hope this helps.

           

          Felix

           

          J. Felix McNulty

          Community Moderator (Intel contractor)