we have consulted this case with our HW team, and after having reviewed the E38xx specification documents they found that the necessary information to address your issue is unavailable. We always try to answer your questions on a timely manner and on the best way we can, however since this board was manufactured by a third party vendor (Circuitco http://www.circuitco.com/), the best would be to contact them, as they have access to more information regarding the design of the board, and can provide you with better support, also on their forums you will find experienced Minnowboard users or also the Minnowboard community at http://www.minnowboard.org/.
I would also suggest the following support channels:
Thank you for the reply Jimmy!
While I certainly agree that the overall board design can and does impact power consumption of the SPI peripheral, I'm willing to forget about that impact for now. What I would really like to know is what is the expected power consumption of the SPI peripheral inside the SoC (E3825 or E3805) when you enable it and run it at speeds anywhere from 10Mbps to 15Mbps, with the pins unloaded/disconnected. There should be some way to calculate this? I can't find current-consumption numbers in the datasheet that apply to specific peripheral portions of the chip.
Maybe someone knows what the power consumption attributable to running the SPI interface is on an Intel-designed board that has an E38xx?
On Table 65. Power Rail DC Specs and Max Current of the E3800 datasheet, you can find V1P8S (which is the power plane for the SPI interface) voltage tolerance and max current, you could deduct a maximum power consumption with this values. It should give a result on the 10's of mW as you have correctly stated above.
Unfortunately, we do not have data for power consumption of this interface on third party boards.
This situation has been observed only on third party boards. The following document may be of interest:
In order to avoid any SPI inconveniences, we recommend you verify that your design complies with the guidelines stated in section 21, on pages 259, 260, and 261 of the Intel(R) Atom(TM) Processor E3800 Product Family Platform Design Guide (PDG) document # 512379.
This behavior could be caused by several sources.
One of the primary things is the SPI interface passes through an on board level shifter to convert it from 1.8 V to 3.3 V.
Please note that Intel does not validate nor test disconnected interfaces.
There are SPI testing tools available on the market that can be used to test the performance of your device.
Also, please note that the MinnowBoard Max was never intended nor designed to be a low power reference platform. As a development platform designed to use a regulated external power supply, low power options were not taken into consideration.
Our suggestion for you to receive the best support on this issue is to contact the manufacturer, as they have all the information related to this project:
Please let us know if this information is useful, if you can provide a detailed step by step on how the measurements were done, we may be able to help further.